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‎README.md

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[![CI](https://github.com/PyHDI/veriloggen/actions/workflows/main.yml/badge.svg?branch=develop)](https://github.com/PyHDI/veriloggen/actions/workflows/main.yml)
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[![Build Status](https://www.travis-ci.com/PyHDI/veriloggen.svg?branch=develop)](https://www.travis-ci.com/PyHDI/veriloggen)
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A Mixed-Paradigm Hardware Construction Framework
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