Skip to content

Commit 82aed4e

Browse files
vamovsikvamovsik
authored
[AMDGPU] Remove AAInstanceInfo from the AMDGPUAttributor (llvm#150232) (llvm#3289)
2 parents c67c092 + ad00078 commit 82aed4e

File tree

7 files changed

+19
-22
lines changed

7 files changed

+19
-22
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1336,8 +1336,7 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM,
13361336
&AAPotentialValues::ID, &AAAMDFlatWorkGroupSize::ID,
13371337
&AAAMDMaxNumWorkgroups::ID, &AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID,
13381338
&AACallEdges::ID, &AAPointerInfo::ID, &AAPotentialConstantValues::ID,
1339-
&AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID,
1340-
&AAInstanceInfo::ID});
1339+
&AAUnderlyingObjects::ID, &AAAddressSpace::ID, &AAIndirectCallInfo::ID});
13411340

13421341
AttributorConfig AC(CGUpdater);
13431342
AC.IsClosedWorldModule = Options.IsClosedWorld;

‎llvm/test/CodeGen/AMDGPU/aa-as-infer.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -259,8 +259,7 @@ define void @kernel_argument_promotion_pattern_intra_procedure(ptr %p, i32 %val)
259259
define internal void @use_argument_after_promotion(ptr %p, i32 %val) {
260260
; CHECK-LABEL: define internal void @use_argument_after_promotion(
261261
; CHECK-SAME: ptr [[P:%.*]], i32 [[VAL:%.*]]) #[[ATTR0]] {
262-
; CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(1)
263-
; CHECK-NEXT: store i32 [[VAL]], ptr addrspace(1) [[TMP1]], align 4
262+
; CHECK-NEXT: store i32 [[VAL]], ptr [[P]], align 4
264263
; CHECK-NEXT: ret void
265264
;
266265
store i32 %val, ptr %p

‎llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll

Lines changed: 5 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -14,31 +14,26 @@ define internal fastcc void @foo(ptr %kg) {
1414
; CHECK-NEXT: [[NUM_CLOSURE_I26_I:%.*]] = getelementptr i8, ptr [[KG]], i64 276
1515
; CHECK-NEXT: br label %[[WHILE_COND:.*]]
1616
; CHECK: [[WHILE_COND]]:
17-
; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[KG]] to ptr addrspace(5)
18-
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4
17+
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[KG]], align 4
1918
; CHECK-NEXT: [[IDXPROM_I:%.*]] = zext i32 [[TMP1]] to i64
2019
; CHECK-NEXT: switch i32 0, label %[[SW_BB92:.*]] [
2120
; CHECK-NEXT: i32 1, label %[[SW_BB92]]
2221
; CHECK-NEXT: i32 0, label %[[SUBD_TRIANGLE_PATCH_EXIT_I_I35:.*]]
2322
; CHECK-NEXT: ]
2423
; CHECK: [[SUBD_TRIANGLE_PATCH_EXIT_I_I35]]:
2524
; CHECK-NEXT: [[ARRAYIDX_I27_I:%.*]] = getelementptr float, ptr [[KG]], i64 [[IDXPROM_I]]
26-
; CHECK-NEXT: [[TMP5:%.*]] = addrspacecast ptr [[ARRAYIDX_I27_I]] to ptr addrspace(5)
27-
; CHECK-NEXT: store float 0.000000e+00, ptr addrspace(5) [[TMP5]], align 4
25+
; CHECK-NEXT: store float 0.000000e+00, ptr [[ARRAYIDX_I27_I]], align 4
2826
; CHECK-NEXT: br label %[[WHILE_COND]]
2927
; CHECK: [[SW_BB92]]:
3028
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <3 x i32> zeroinitializer, i32 [[TMP1]], i64 0
3129
; CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = bitcast <3 x i32> [[INSERT]] to <3 x float>
3230
; CHECK-NEXT: [[SHFL:%.*]] = shufflevector <3 x float> [[SPLAT_SPLATINSERT_I]], <3 x float> zeroinitializer, <4 x i32> zeroinitializer
33-
; CHECK-NEXT: [[TMP2:%.*]] = addrspacecast ptr [[NUM_CLOSURE_I26_I]] to ptr addrspace(5)
34-
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr addrspace(5) [[TMP2]], align 4
31+
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[NUM_CLOSURE_I26_I]], align 4
3532
; CHECK-NEXT: [[IDXPROM_I27_I:%.*]] = sext i32 [[LOAD]] to i64
3633
; CHECK-NEXT: [[ARRAYIDX_I28_I:%.*]] = getelementptr [64 x %struct.ShaderClosure], ptr [[CLOSURE_I25_I]], i64 0, i64 [[IDXPROM_I27_I]]
37-
; CHECK-NEXT: [[TMP3:%.*]] = addrspacecast ptr [[ARRAYIDX_I28_I]] to ptr addrspace(5)
38-
; CHECK-NEXT: store <4 x float> [[SHFL]], ptr addrspace(5) [[TMP3]], align 16
34+
; CHECK-NEXT: store <4 x float> [[SHFL]], ptr [[ARRAYIDX_I28_I]], align 16
3935
; CHECK-NEXT: [[INC_I30_I:%.*]] = or i32 [[LOAD]], 1
40-
; CHECK-NEXT: [[TMP4:%.*]] = addrspacecast ptr [[NUM_CLOSURE_I26_I]] to ptr addrspace(5)
41-
; CHECK-NEXT: store i32 [[INC_I30_I]], ptr addrspace(5) [[TMP4]], align 4
36+
; CHECK-NEXT: store i32 [[INC_I30_I]], ptr [[NUM_CLOSURE_I26_I]], align 4
4237
; CHECK-NEXT: br label %[[WHILE_COND]]
4338
;
4439
entry:

‎llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,8 @@ define internal void @direct() {
1414
; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
1515
; CHECK-NEXT: [[FPTR:%.*]] = alloca ptr, align 8, addrspace(5)
1616
; CHECK-NEXT: store ptr @indirect, ptr addrspace(5) [[FPTR]], align 8
17-
; CHECK-NEXT: call void @indirect()
17+
; CHECK-NEXT: [[FP:%.*]] = load ptr, ptr addrspace(5) [[FPTR]], align 8
18+
; CHECK-NEXT: call void [[FP]]()
1819
; CHECK-NEXT: ret void
1920
;
2021
%fptr = alloca ptr, addrspace(5)
@@ -35,6 +36,6 @@ define amdgpu_kernel void @test_direct_indirect_call() {
3536
}
3637
;.
3738
; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
38-
; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
39-
; CHECK: attributes #[[ATTR2]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
39+
; CHECK: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" }
40+
; CHECK: attributes #[[ATTR2]] = { "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
4041
;.

‎llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,8 @@ define amdgpu_kernel void @test_simple_indirect_call() #0 {
2626
; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
2727
; ATTRIBUTOR_GCN-NEXT: [[FPTR:%.*]] = alloca ptr, align 8, addrspace(5)
2828
; ATTRIBUTOR_GCN-NEXT: store ptr @indirect, ptr addrspace(5) [[FPTR]], align 8
29-
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
29+
; ATTRIBUTOR_GCN-NEXT: [[FP:%.*]] = load ptr, ptr addrspace(5) [[FPTR]], align 8
30+
; ATTRIBUTOR_GCN-NEXT: call void [[FP]]()
3031
; ATTRIBUTOR_GCN-NEXT: ret void
3132
;
3233
%fptr = alloca ptr, addrspace(5)
@@ -42,5 +43,5 @@ attributes #0 = { "amdgpu-no-dispatch-id" }
4243
; AKF_GCN: attributes #[[ATTR0]] = { "amdgpu-calls" "amdgpu-no-dispatch-id" "amdgpu-stack-objects" }
4344
;.
4445
; ATTRIBUTOR_GCN: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
45-
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
46+
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-dispatch-id" "uniform-work-group-size"="false" }
4647
;.

‎llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,8 @@ define amdgpu_kernel void @foo(ptr noundef %fp) {
6060
; CHECK-NEXT: entry:
6161
; CHECK-NEXT: [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
6262
; CHECK-NEXT: store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
63-
; CHECK-NEXT: call void [[FP]]()
63+
; CHECK-NEXT: [[LOAD:%.*]] = load ptr, ptr addrspace(5) [[FP_ADDR]], align 8
64+
; CHECK-NEXT: call void [[LOAD]]()
6465
; CHECK-NEXT: ret void
6566
;
6667
entry:

‎llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,8 @@ define amdgpu_kernel void @test_simple_indirect_call() {
3535
; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
3636
; ATTRIBUTOR_GCN-NEXT: [[FPTR:%.*]] = alloca ptr, align 8, addrspace(5)
3737
; ATTRIBUTOR_GCN-NEXT: store ptr @indirect, ptr addrspace(5) [[FPTR]], align 8
38-
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
38+
; ATTRIBUTOR_GCN-NEXT: [[FP:%.*]] = load ptr, ptr addrspace(5) [[FPTR]], align 8
39+
; ATTRIBUTOR_GCN-NEXT: call void [[FP]]()
3940
; ATTRIBUTOR_GCN-NEXT: ret void
4041
;
4142
; GFX9-LABEL: test_simple_indirect_call:
@@ -81,7 +82,7 @@ define amdgpu_kernel void @test_simple_indirect_call() {
8182
; AKF_GCN: attributes #[[ATTR0]] = { "amdgpu-calls" "amdgpu-stack-objects" }
8283
;.
8384
; ATTRIBUTOR_GCN: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
84-
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
85+
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" }
8586
;.
8687
; AKF_GCN: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
8788
;.

0 commit comments

Comments
 (0)