Merge pull request #5133 from YosysHQ/krys/functional_ordering

Maintain port ordering for functional backend

Author: KrystalDelusion

kernel/functional.cc

@@ -518,10 +518,13 @@ class FunctionalIRConstruction {
 			if (cell->type.in(ID($assert), ID($assume), ID($live), ID($fair), ID($cover), ID($check)))
 				queue.emplace_back(cell);
 		}
-		for (auto wire : module->wires()) {
-			if (wire->port_input)
+		// we are relying here on unsorted pools iterating last-in-first-out
+		for (auto riter = module->ports.rbegin(); riter != module->ports.rend(); ++riter) {
+			auto *wire = module->wire(*riter);
+			if (wire && wire->port_input) {
 				factory.add_input(wire->name, ID($input), Sort(wire->width));
-			if (wire->port_output) {
+			}
+			if (wire && wire->port_output) {
 				auto &output = factory.add_output(wire->name, ID($output), Sort(wire->width));
 				output.set_value(enqueue(DriveChunk(DriveChunkWire(wire, 0, wire->width))));
 			}