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change tcl_escape_synplify to tcl_quote
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+2
-5
lines changed

2 files changed

+2
-5
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nmigen/build/plat.py

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -392,9 +392,6 @@ def escape_one(match):
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def tcl_escape(string):
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return "{" + re.sub(r"([{}\\])", r"\\\1", string) + "}"
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395-
def tcl_escape_synplify(string):
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return "{" + re.sub(r"([${}\\])", r"\\\1", string) + "}"
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def tcl_quote(string):
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return '"' + re.sub(r"([$[\\])", r"\\\1", string) + '"'
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nmigen/vendor/lattice_machxo_2_3l.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -107,9 +107,9 @@ class LatticeMachXO2Or3LPlatform(TemplatedPlatform):
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set_hierarchy_separator {/}
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{% for net_signal, port_signal, frequency in platform.iter_clock_constraints() -%}
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{% if port_signal is not none -%}
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create_clock -name {{port_signal.name|tcl_escape_synplify}} -period {{1000000000/frequency}} [get_ports {{port_signal.name|tcl_escape_synplify}}]
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create_clock -name {{port_signal.name|tcl_quote}} -period {{1000000000/frequency}} [get_ports {{port_signal.name|tcl_quote}}]
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{% else -%}
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create_clock -name {{net_signal.name|tcl_escape_synplify}} -period {{1000000000/frequency}} [get_nets {{net_signal|hierarchy("/")|tcl_escape_synplify}}]
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create_clock -name {{net_signal.name|tcl_quote}} -period {{1000000000/frequency}} [get_nets {{net_signal|hierarchy("/")|tcl_quote}}]
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{% endif %}
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{% endfor %}
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{{get_override("add_constraints")|default("# (add_constraints placeholder)")}}

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