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docs/axi_ltc2387: Update doc
Signed-off-by: Stanca Pop <[email protected]>
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docs/library/axi_ltc2387/index.rst

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@@ -7,8 +7,8 @@ AXI LTC2387
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:path: library/axi_ltc2387
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The :git-hdl:`AXI LTC2387 <library/axi_ltc2387>` IP core can be used to
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interface :adi:`LTC2387-18`, :adi:`LTC2386-18`, :adi:`LTC2385-18` and
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:adi:`ADAQ23878` devices.
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interface :adi:`LTC2387-18`, :adi:`LTC2387-16`, :adi:`LTC2386-18`,
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:adi:`LTC2385-18` and :adi:`ADAQ23878` devices.
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This documentation only covers the IP core and requires that one must be
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familiar with the device for a complete and better understanding.
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version of the chip, is done by the `ADC_RES` and `OUT_RES` parameters of
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the modules.
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* For the 18-bit, ADC_RES=18 (=> OUT_RES=32; addresses should be on a nb. of
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* For the 18-bit, ADC_RES=18 (=> OUT_RES=32; addresses should be on a no. of
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bits power of 2)
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* For the 16-bit, ADC_RES=16 (=> OUT_RES=16)
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.. warning::
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When using the ONE LANE configuration (TWOLANES=0), the only resolution
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supported is 18 bits!
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Detailed Description
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--------------------------------------------------------------------------------
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The :ref:`axi_ltc2387 interface` must be connected directly to the top file of
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the design, as I/O primitives are part of the IP.
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The example design uses a DMA to move the data from the output of the IP to memory.
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The example design uses a DMA to move the data from the output of the IP to
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memory.
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If the data needs to be processed in HDL before moving to the memory, it can be
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done at the output of the IP (at the system level) or inside the ADC interface
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* HDL project at :git-hdl:`projects/cn0577`
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* HDL project documentation at :ref:`cn0577`
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* :adi:`LTC2387-18` 18-bit 15 MSPS
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* :adi:`LTC2387-16` 16-bit 15 MSPS
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* :adi:`LTC2386-18` 18-bit 10 MSPS
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* :adi:`LTC2385-18` 18-bit 5 MSPS
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* :adi:`ADAQ23878` 18-bit 15 MSPS

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