@@ -76,10 +76,17 @@ set TX_SAMPLES_PER_CHANNEL [expr $TX_NUM_OF_LANES * 8*$TX_DATAPATH_WIDTH / ($TX_
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set adc_offload_name mxfe_rx_data_offload
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set adc_data_width [expr $RX_DMA_SAMPLE_WIDTH *$RX_NUM_OF_CONVERTERS *$RX_SAMPLES_PER_CHANNEL ]
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set adc_dma_data_width $adc_data_width
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+ set adc_fifo_address_width [expr int(ceil(log(($adc_fifo_samples_per_converter *$RX_NUM_OF_CONVERTERS ) / ($adc_data_width /$RX_DMA_SAMPLE_WIDTH ))/log(2)))]
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set dac_offload_name mxfe_tx_data_offload
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set dac_data_width [expr $TX_SAMPLE_WIDTH *$TX_NUM_OF_CONVERTERS *$TX_SAMPLES_PER_CHANNEL ]
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set dac_dma_data_width [expr $TX_DMA_SAMPLE_WIDTH *$TX_NUM_OF_CONVERTERS *$TX_SAMPLES_PER_CHANNEL ]
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+ set dac_fifo_address_width [expr int(ceil(log(($dac_fifo_samples_per_converter *$TX_NUM_OF_CONVERTERS ) / ($dac_data_width /$TX_DMA_SAMPLE_WIDTH ))/log(2)))]
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+
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+ set adc_do_mem_type [ expr { [info exists ad_project_params(ADC_DO_MEM_TYPE)] \
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+ ? $ad_project_params(ADC_DO_MEM_TYPE) : 0 } ]
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+ set dac_do_mem_type [ expr { [info exists ad_project_params(DAC_DO_MEM_TYPE)] \
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+ ? $ad_project_params(DAC_DO_MEM_TYPE) : 0 } ]
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create_bd_port -dir I rx_device_clk
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create_bd_port -dir I tx_device_clk
@@ -208,9 +215,10 @@ ad_ip_instance util_cpack2 util_mxfe_cpack [list \
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SAMPLE_DATA_WIDTH $RX_DMA_SAMPLE_WIDTH \
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]
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+ set adc_offload_size [expr $adc_data_width / 8 * 2**$adc_fifo_address_width ]
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ad_data_offload_create $adc_offload_name \
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0 \
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- $adc_offload_type \
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+ $adc_do_mem_type \
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$adc_offload_size \
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$adc_data_width \
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$adc_data_width
@@ -266,9 +274,10 @@ ad_ip_instance util_upack2 util_mxfe_upack [list \
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SAMPLE_DATA_WIDTH $TX_SAMPLE_WIDTH \
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]
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+ set dac_offload_size [expr $dac_data_width / 8 * 2**$dac_fifo_address_width ]
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ad_data_offload_create $dac_offload_name \
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1 \
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- $dac_offload_type \
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+ $dac_do_mem_type \
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$dac_offload_size \
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$dac_data_width \
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$dac_data_width
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