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projects: AD413x: Added readme documentation
Signed-off-by: Joyce Velasco <[email protected]>
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‎doc/sphinx/source/projects/afe/ad413x.rst‎

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.. include:: ../../../../../projects/ad413x/README.rst

‎doc/sphinx/source/projects_doc.rst‎

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projects/adc-dac/*
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ANALOG FRONT-ENDS
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=================
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.. toctree::
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:maxdepth: 1
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:glob:
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projects/afe/*
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FREQUENCY GENERATORS
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====================
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.. toctree::

‎projects/ad413x/README.rst‎

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AD413x no-OS Example Project
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============================
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.. contents::
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:depth: 3
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Supported Evaluation Boards
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---------------------------
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- :adi:`EVAL-AD4130-8WARDZ`
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Overview
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--------
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The EVAL-AD4130-8WARDZ is an evaluation board that allows users to
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evaluate the AD4130-8, an ultra low power, high precision ADC. The fully
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integrated analog front end (AFE) includes a multiplexer for up to 16
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single-ended or eight differential inputs, programmable gain amplifier
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(PGA), 24-bit sigma-delta (Σ-Δ) ADC. It features programmable gain
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amplifiers and multiplexers for selecting input channels, supporting
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digital communication over an SPI interface.
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Applications
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------------
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- Smart transmitters
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- Wireless battery and harvester powered sensor nodes
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- Portable instrumentation
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- Temperature measurement: thermocouple, RTD, thermistors
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- Pressure measurement: bridge transducers
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- Healthcare and wearables
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Hardware Specifications
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------------------------
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Power Supply Requirements
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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The EVAL-AD4130-8 evaluation board operates with a 5V USB power supply
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and provides flexibility in power configuration. It features a default
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3.3V regulator for AVDD and an optional 1.8V regulator. External
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AVDD/AVSS connections can be made via Connector J7. The board is
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equipped to facilitate both AVDD and IOVDD selections with integrated
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regulators, enhancing its utility in ADC performance testing and data
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acquisition tasks.
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============ =========================
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J7 Connector Function
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============ =========================
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1 External IOVDD connection
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2 External GND connection
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3 External AVSS connection
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4 External AVDD connection
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============ =========================
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On-board Connectors
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~~~~~~~~~~~~~~~~~~~
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+-----------------------------------+-----------------------------------+
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| Connector | Description |
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+-----------------------------------+-----------------------------------+
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| Connector J10 (Wire Bridge) | Handles analog input for 4/6 Wire |
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| | bridge setups, with specific pin |
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| | functions such as Excitation, |
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| | External Reference, and Ground |
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| | connections. |
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+-----------------------------------+-----------------------------------+
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| Connector J12 (DC Input) | Provides DC connections for AIN8 |
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| | to AIN15, facilitating analog |
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| | input without DC filtering. |
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+-----------------------------------+-----------------------------------+
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Digital Communication Pins
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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================= ========= ========== ========
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PMOD Connector P7 Function Connection Function
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1 CS_N 7 SYNC_N
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2 MOSI/DIN 8 INT
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3 MISO/DOUT 9 N/C
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4 SCLK 10 N/C
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5 GND 11 GND
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6 V_USB 12 V_USB
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================= ========= ========== ========
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No-OS Build Setup
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-----------------
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Please see: `https://wiki.analog.com/resources/no-os/build`
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No-OS Supported Examples
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-------------------------
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The AD413x no-OS project supports two primary example types: BASIC and
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IIO. The BASIC example focuses on initializing the AD413x, demonstrating
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continuous conversion, SPI data reading, and data display. Conversely,
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the IIO example sets up a device and application for more intricate
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operations, initializing UART communication and IIO buffers.
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The initialization data used in the examples is taken out from the
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`Project Data Source Path <https://github.com/analogdevicesinc/no-OS/tree/main/projects/ad413x/src/app>`__
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Basic example
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~~~~~~~~~~~~~
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The basic example code for the AD413x device initializes SPI
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communication in four-wire mode, configures GPIO for conversion
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readiness, and applies predefined presets for channel setup. These
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presets specify input sources, gain settings, filters, and reference
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settings. A soft reset is performed to prepare the device for operation,
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and key parameters such as master clock mode and standby controls are
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set. Once initialized, ADC operation modes, either single or continuous,
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are managed to facilitate data acquisition. This configuration enables
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ready interaction with the AD413x AFE using the no-OS driver setup,
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allowing effective data collection and management.
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In order to build the basic example, make sure you have the following
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configuration in the
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`Makefile <https://github.com/analogdevicesinc/no-OS/blob/main/projects/ad413x/Makefile>`__
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.. code-block:: bash
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# Select the example you want to enable by choosing y for enabling and n for disabling
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BASIC_EXAMPLE = y
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IIOD = n
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IIO example
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~~~~~~~~~~~
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The IIO example code for the AD413x ADC series demonstrates integration
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with the Industrial I/O framework for streamlined data acquisition.
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Initialization is handled by ``ad413x_iio_init``, which configures the
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ADC per given parameters and allocates resources. Channel management is
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dynamic, utilizing ``ad413x_iio_close_channels`` and
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``ad413x_iio_update_active_channels`` to modify channel states. Sample
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data is retrieved using ``ad413x_iio_read_samples``, applying continuous
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conversion techniques. The code enables IIO attribute setup for scale
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and raw data properties, ensuring seamless integration and management of
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AD413x devices within IIO applications.
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If you are not familiar with ADI IIO Application, please take a look at:
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`IIO No-OS <https://wiki.analog.com/resources/tools-software/no-os-software/iio>`__
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In order to build the IIO project, make sure you have the following
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configuration in the Makefile:
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.. code-block:: bash
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# Configure the example you want to enable by setting 'y' for enable and 'n' for disable
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BASIC_EXAMPLE = n
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IIOD = y
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No-OS Supported Platforms
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-------------------------
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Xilinx
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~~~~~~
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Hardware Used
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^^^^^^^^^^^^^
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- EVAL-AD4130-8WARDZ
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- ZedBoard
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Connections
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^^^^^^^^^^^
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- Power the EVAL-AD4130-8 board with a 5V USB supply.
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- Use on-board regulators to set up AVDD (default 3.3V) and IOVDD.
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- Connect SPI lines of the EVAL-AD4130-8 board to the ZedBoard’s
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appropriate GPIO/PMOD headers.
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- Ensure a common ground is established between EVAL-AD4130-8 and
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ZedBoard.
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+-----------------+-----------------+-----------------+-----------------+
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| **EVAL-AD4130-8 | **Function** | **ZedBoard PMOD | **Function** |
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| PMOD | | Header** | |
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| Connector** | | | |
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+-----------------+-----------------+-----------------+-----------------+
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| P7-1 | CS_N | Pmod Header Pin | Chip Select |
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| | | 1 | (Active Low) |
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+-----------------+-----------------+-----------------+-----------------+
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| P7-2 | MOSI/DIN | Pmod Header Pin | Master Out |
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| | | 2 | Slave In / Data |
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| | | | Input |
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+-----------------+-----------------+-----------------+-----------------+
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| P7-3 | MISO/DOUT | Pmod Header Pin | Master In Slave |
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| | | 3 | Out / Data |
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| | | | Output |
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+-----------------+-----------------+-----------------+-----------------+
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| P7-4 | SCLK | Pmod Header Pin | Serial Clock |
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| | | 4 | |
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+-----------------+-----------------+-----------------+-----------------+
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| P7-5 | GND | Pmod Header Pin | Ground |
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| | | 5 | reference for |
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| | | | SPI |
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| | | | communication |
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+-----------------+-----------------+-----------------+-----------------+
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| P7-6 | V_USB | Pmod Header Pin | Voltage supply |
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| | | 6 | for the board |
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| | | | and peripherals |
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+-----------------+-----------------+-----------------+-----------------+
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- Use a 12V supply in the barrel jack (J20) to power the ZedBoard.
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- Connect the ZedBoard’s USB-UART to your PC via MicroUSB.
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Build Command
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^^^^^^^^^^^^^^
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.. code-block:: bash
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cp /system_top.xsa .
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# to delete current build
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make reset
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# to build
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the project make
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# to flash the code
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make run

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