Skip to content

Commit 7b42f18

Browse files
diggerlingithub-actions[bot]
diggerlin
authored and
github-actions[bot]
committed
Automerge: [Reland] [PowerPC] frontend get target feature from backend with cpu name (#144594)
1. The PR proceeds with a backend target hook to allow front-ends to determine what target features are available in a compilation based on the CPU name. 2. Fix a backend target feature bug that supports HTM for Power8/9/10/11. However, HTM is only supported on Power8/9 according to the ISA. 3. All target features that are hardcoded in PPC.cpp can be retrieved from the backend target feature. I have double-checked that the hardcoded logic for inferring target features from the CPU in the frontend(PPC.cpp) is the same as in PPC.td. The reland patch addressed the comment llvm/llvm-project#137670 (comment)
2 parents b8fa994 + bf79d48 commit 7b42f18

File tree

16 files changed

+383
-263
lines changed

16 files changed

+383
-263
lines changed

‎clang/lib/Basic/Targets/PPC.cpp‎

Lines changed: 7 additions & 141 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
#include "clang/Basic/MacroBuilder.h"
1616
#include "clang/Basic/TargetBuiltins.h"
1717
#include "llvm/TargetParser/PPCTargetParser.h"
18+
#include <optional>
1819

1920
using namespace clang;
2021
using namespace clang::targets;
@@ -516,129 +517,14 @@ static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
516517
bool PPCTargetInfo::initFeatureMap(
517518
llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
518519
const std::vector<std::string> &FeaturesVec) const {
519-
Features["altivec"] = llvm::StringSwitch<bool>(CPU)
520-
.Case("7400", true)
521-
.Case("g4", true)
522-
.Case("7450", true)
523-
.Case("g4+", true)
524-
.Case("970", true)
525-
.Case("g5", true)
526-
.Case("pwr6", true)
527-
.Case("pwr7", true)
528-
.Case("pwr8", true)
529-
.Case("pwr9", true)
530-
.Case("ppc64", true)
531-
.Case("ppc64le", true)
532-
.Default(false);
533-
534-
Features["power9-vector"] = (CPU == "pwr9");
535-
Features["crypto"] = llvm::StringSwitch<bool>(CPU)
536-
.Case("ppc64le", true)
537-
.Case("pwr9", true)
538-
.Case("pwr8", true)
539-
.Default(false);
540-
Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
541-
.Case("ppc64le", true)
542-
.Case("pwr9", true)
543-
.Case("pwr8", true)
544-
.Default(false);
545-
Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
546-
.Case("ppc64le", true)
547-
.Case("pwr9", true)
548-
.Case("pwr8", true)
549-
.Case("pwr7", true)
550-
.Default(false);
551-
Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
552-
.Case("ppc64le", true)
553-
.Case("pwr9", true)
554-
.Case("pwr8", true)
555-
.Case("pwr7", true)
556-
.Default(false);
557-
Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
558-
.Case("ppc64le", true)
559-
.Case("pwr9", true)
560-
.Case("pwr8", true)
561-
.Default(false);
562-
Features["crbits"] = llvm::StringSwitch<bool>(CPU)
563-
.Case("ppc64le", true)
564-
.Case("pwr9", true)
565-
.Case("pwr8", true)
566-
.Default(false);
567-
Features["vsx"] = llvm::StringSwitch<bool>(CPU)
568-
.Case("ppc64le", true)
569-
.Case("pwr9", true)
570-
.Case("pwr8", true)
571-
.Case("pwr7", true)
572-
.Default(false);
573-
Features["htm"] = llvm::StringSwitch<bool>(CPU)
574-
.Case("ppc64le", true)
575-
.Case("pwr9", true)
576-
.Case("pwr8", true)
577-
.Default(false);
578-
579-
// ROP Protect is off by default.
580-
Features["rop-protect"] = false;
581-
// Privileged instructions are off by default.
582-
Features["privileged"] = false;
583520

584-
if (getTriple().isOSAIX()) {
585-
// The code generated by the -maix-small-local-[exec|dynamic]-tls option is
586-
// turned off by default.
587-
Features["aix-small-local-exec-tls"] = false;
588-
Features["aix-small-local-dynamic-tls"] = false;
589-
590-
// Turn off TLS model opt by default.
591-
Features["aix-shared-lib-tls-model-opt"] = false;
592-
}
593-
594-
Features["spe"] = llvm::StringSwitch<bool>(CPU)
595-
.Case("8548", true)
596-
.Case("e500", true)
597-
.Default(false);
598-
599-
Features["isa-v206-instructions"] = llvm::StringSwitch<bool>(CPU)
600-
.Case("ppc64le", true)
601-
.Case("pwr9", true)
602-
.Case("pwr8", true)
603-
.Case("pwr7", true)
604-
.Case("a2", true)
605-
.Default(false);
606-
607-
Features["isa-v207-instructions"] = llvm::StringSwitch<bool>(CPU)
608-
.Case("ppc64le", true)
609-
.Case("pwr9", true)
610-
.Case("pwr8", true)
611-
.Default(false);
612-
613-
Features["isa-v30-instructions"] =
614-
llvm::StringSwitch<bool>(CPU).Case("pwr9", true).Default(false);
615-
616-
Features["quadword-atomics"] =
617-
getTriple().isArch64Bit() && llvm::StringSwitch<bool>(CPU)
618-
.Case("pwr9", true)
619-
.Case("pwr8", true)
620-
.Default(false);
621-
622-
// Power10 includes all the same features as Power9 plus any features specific
623-
// to the Power10 core.
624-
if (CPU == "pwr10" || CPU == "power10") {
625-
initFeatureMap(Features, Diags, "pwr9", FeaturesVec);
626-
addP10SpecificFeatures(Features);
627-
}
628-
629-
// Power11 includes all the same features as Power10 plus any features
630-
// specific to the Power11 core.
631-
if (CPU == "pwr11" || CPU == "power11") {
632-
initFeatureMap(Features, Diags, "pwr10", FeaturesVec);
633-
addP11SpecificFeatures(Features);
634-
}
521+
const llvm::Triple &TheTriple = getTriple();
635522

636-
// Future CPU should include all of the features of Power 11 as well as any
637-
// additional features (yet to be determined) specific to it.
638-
if (CPU == "future") {
639-
initFeatureMap(Features, Diags, "pwr11", FeaturesVec);
640-
addFutureSpecificFeatures(Features);
641-
}
523+
std::optional<llvm::StringMap<bool>> FeaturesOpt =
524+
llvm::PPC::getPPCDefaultTargetFeatures(TheTriple,
525+
llvm::PPC::normalizeCPUName(CPU));
526+
if (FeaturesOpt)
527+
Features = FeaturesOpt.value();
642528

643529
if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
644530
return false;
@@ -700,26 +586,6 @@ bool PPCTargetInfo::initFeatureMap(
700586
return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
701587
}
702588

703-
// Add any Power10 specific features.
704-
void PPCTargetInfo::addP10SpecificFeatures(
705-
llvm::StringMap<bool> &Features) const {
706-
Features["htm"] = false; // HTM was removed for P10.
707-
Features["paired-vector-memops"] = true;
708-
Features["mma"] = true;
709-
Features["power10-vector"] = true;
710-
Features["pcrelative-memops"] = true;
711-
Features["prefix-instrs"] = true;
712-
Features["isa-v31-instructions"] = true;
713-
}
714-
715-
// Add any Power11 specific features.
716-
void PPCTargetInfo::addP11SpecificFeatures(
717-
llvm::StringMap<bool> &Features) const {}
718-
719-
// Add features specific to the "Future" CPU.
720-
void PPCTargetInfo::addFutureSpecificFeatures(
721-
llvm::StringMap<bool> &Features) const {}
722-
723589
bool PPCTargetInfo::hasFeature(StringRef Feature) const {
724590
return llvm::StringSwitch<bool>(Feature)
725591
.Case("powerpc", true)

‎clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,5 +35,5 @@ int &g() { return r; }
3535
// DARWIN-LABEL: define internal cxx_fast_tlscc void @__tls_init()
3636
// CHECK: call void @[[R_INIT]]()
3737

38-
// LINUX_AIX: attributes [[ATTR0]] = { {{.*}}"target-features"{{.*}} }
38+
// LINUX_AIX: attributes [[ATTR0]] = { {{.*}} }
3939
// DARWIN: attributes [[ATTR1]] = { {{.*}}nounwind{{.*}}"target-features"{{.*}} }

‎clang/test/Driver/aix-shared-lib-tls-model-opt.c‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
// RUN: %clang -target powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefixes=CHECK-AIX,CHECK-AIX-OFF %s
2-
// RUN: %clang -target powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefixes=CHECK-AIX,CHECK-AIX-OFF %s
1+
// RUN: %clang -target powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-AIX %s
2+
// RUN: %clang -target powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-AIX %s
33
// RUN: %clang -target powerpc64le-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-LINUX %s
44
// RUN: %clang -target powerpc64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-LINUX %s
55

@@ -19,9 +19,8 @@ int test(void) {
1919

2020
// CHECK-AIX: test() #0 {
2121
// CHECK-AIX: attributes #0 = {
22-
// CHECK-AIX-OFF-SAME: -aix-shared-lib-tls-model-opt
2322
// CHECK-AIX-ON-SAME: +aix-shared-lib-tls-model-opt
2423

25-
// CHECK-LINUX-NOT: {{[-+]aix-shared-lib-tls-model-opt}}
24+
// CHECK-LINUX-NOT: {{[+]aix-shared-lib-tls-model-opt}}
2625

2726
// CHECK-UNSUPPORTED-TARGET: option '-maix-shared-lib-tls-model-opt' cannot be specified on this target

‎clang/test/Driver/aix-small-local-exec-dynamic-tls.c‎

Lines changed: 19 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,48 +1,47 @@
1-
// RUN: %clang -target powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-AIX-DEFAULT %s
2-
// RUN: %clang -target powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-AIX-DEFAULT %s
3-
// RUN: %clang -target powerpc64le-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-LINUX %s
4-
// RUN: %clang -target powerpc64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-LINUX %s
1+
// RUN: %clang --target=powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-DEFAULT %s
2+
// RUN: %clang --target=powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-DEFAULT %s
3+
// RUN: %clang --target=powerpc64le-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-DEFAULT %s
4+
// RUN: %clang --target=powerpc64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-DEFAULT %s
55

6-
// RUN: %clang -target powerpc64-unknown-aix -maix-small-local-exec-tls -S -emit-llvm \
6+
// RUN: %clang --target=powerpc64-unknown-aix -maix-small-local-exec-tls -S -emit-llvm \
77
// RUN: %s -o - | FileCheck %s --check-prefix=CHECK-AIX_SMALL_LOCALEXEC_TLS
88

9-
// RUN: %clang -target powerpc64-unknown-aix -maix-small-local-dynamic-tls -S -emit-llvm \
9+
// RUN: %clang --target=powerpc64-unknown-aix -maix-small-local-dynamic-tls -S -emit-llvm \
1010
// RUN: %s -o - | FileCheck %s --check-prefix=CHECK-AIX_SMALL_LOCALDYNAMIC_TLS
1111

12-
// RUN: not %clang -target powerpc-unknown-aix -maix-small-local-exec-tls \
12+
// RUN: not %clang --target=powerpc-unknown-aix -maix-small-local-exec-tls \
1313
// RUN: -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-AIX32 %s
14-
// RUN: not %clang -target powerpc64le-unknown-linux-gnu -maix-small-local-exec-tls \
14+
// RUN: not %clang --target=powerpc64le-unknown-linux-gnu -maix-small-local-exec-tls \
1515
// RUN: -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-LINUX %s
16-
// RUN: not %clang -target powerpc64-unknown-linux-gnu -maix-small-local-exec-tls \
16+
// RUN: not %clang --target=powerpc64-unknown-linux-gnu -maix-small-local-exec-tls \
1717
// RUN: -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-LINUX %s
18-
// RUN: not %clang -target powerpc64-unknown-aix -maix-small-local-exec-tls \
18+
// RUN: not %clang --target=powerpc64-unknown-aix -maix-small-local-exec-tls \
1919
// RUN: -fsyntax-only -fno-data-sections %s 2>&1 | \
2020
// RUN: FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
21-
// RUN: not %clang -target powerpc64-unknown-linux-gnu -maix-small-local-exec-tls \
21+
// RUN: not %clang --target=powerpc64-unknown-linux-gnu -maix-small-local-exec-tls \
2222
// RUN: -fsyntax-only -fno-data-sections %s 2>&1 | \
2323
// RUN: FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
2424

25-
// RUN: not %clang -target powerpc-unknown-aix -maix-small-local-dynamic-tls \
25+
// RUN: not %clang --target=powerpc-unknown-aix -maix-small-local-dynamic-tls \
2626
// RUN: -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-AIX32 %s
27-
// RUN: not %clang -target powerpc64le-unknown-linux-gnu -maix-small-local-dynamic-tls \
27+
// RUN: not %clang --target=powerpc64le-unknown-linux-gnu -maix-small-local-dynamic-tls \
2828
// RUN: -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-LINUX %s
29-
// RUN: not %clang -target powerpc64-unknown-linux-gnu -maix-small-local-dynamic-tls \
29+
// RUN: not %clang --target=powerpc64-unknown-linux-gnu -maix-small-local-dynamic-tls \
3030
// RUN: -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-LINUX %s
31-
// RUN: not %clang -target powerpc64-unknown-aix -maix-small-local-dynamic-tls \
31+
// RUN: not %clang --target=powerpc64-unknown-aix -maix-small-local-dynamic-tls \
3232
// RUN: -fsyntax-only -fno-data-sections %s 2>&1 | \
3333
// RUN: FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
34-
// RUN: not %clang -target powerpc64-unknown-linux-gnu -maix-small-local-dynamic-tls \
34+
// RUN: not %clang --target=powerpc64-unknown-linux-gnu -maix-small-local-dynamic-tls \
3535
// RUN: -fsyntax-only -fno-data-sections %s 2>&1 | \
3636
// RUN: FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
3737

3838
int test(void) {
3939
return 0;
4040
}
4141

42-
// CHECK-AIX-DEFAULT: test() #0 {
43-
// CHECK-AIX-DEFAULT: attributes #0 = {
44-
// CHECK-AIX-DEFAULT-SAME: {{-aix-small-local-exec-tls,.*-aix-small-local-dynamic-tls|-aix-small-local-dynamic-tls,.*-aix-small-local-exec-tls}}
45-
// CHECK-LINUX-NOT: {{[-+]aix-small-local-exec-tls,.*[-+]aix-small-local-dynamic-tls|[-+]aix-small-local-dynamic-tls,.*[-+]aix-small-local-exec-tls}}
42+
// CHECK-DEFAULT: test() #0 {
43+
// CHECK-DEFAULT: attributes #0 = {
44+
// CHECK-DEFAULT-NOT: {{[-+]aix-small-local-exec-tls,.*[-+]aix-small-local-dynamic-tls|[-+]aix-small-local-dynamic-tls,.*[-+]aix-small-local-exec-tls}}
4645

4746
// CHECK-UNSUPPORTED-AIX32: option '-maix-small-local-[exec|dynamic]-tls' cannot be specified on this target
4847
// CHECK-UNSUPPORTED-LINUX: option '-maix-small-local-[exec|dynamic]-tls' cannot be specified on this target

‎clang/test/Driver/ppc-crbits.cpp‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -64,8 +64,6 @@
6464
// RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mno-crbits \
6565
// RUN: -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
6666

67-
// RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr7 -emit-llvm \
68-
// RUN: -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
6967
// RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr7 -mcrbits \
7068
// RUN: -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-CRBITS
7169
// RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr7 -mno-crbits \
@@ -92,8 +90,6 @@
9290
// RUN: %clang -target powerpc-ibm-aix -mcpu=pwr8 -mno-crbits \
9391
// RUN: -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
9492

95-
// RUN: %clang -target powerpc-ibm-aix -mcpu=pwr7 -emit-llvm \
96-
// RUN: -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
9793
// RUN: %clang -target powerpc-ibm-aix -mcpu=pwr7 -mcrbits \
9894
// RUN: -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-CRBITS
9995
// RUN: %clang -target powerpc-ibm-aix -mcpu=pwr7 -mno-crbits \

‎clang/test/Driver/ppc-isa-features.cpp‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -5,20 +5,20 @@
55
// RUN: %clang -target powerpc64-unknown-aix -mcpu=pwr9 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-PWR9
66
// RUN: %clang -target powerpc-unknown-aix -mcpu=pwr10 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-PWR10
77

8-
// CHECK-PWR6: -isa-v206-instructions
9-
// CHECK-PWR6: -isa-v207-instructions
10-
// CHECK-PWR6: -isa-v30-instructions
8+
// CHECK-PWR6-NOT: isa-v206-instructions
9+
// CHECK-PWR6-NOT: isa-v207-instructions
10+
// CHECK-PWR6-NOT: isa-v30-instructions
1111

12-
// CHECK-A2: +isa-v206-instructions
13-
// CHECK-A2: -isa-v207-instructions
14-
// CHECK-A2: -isa-v30-instructions
12+
// CHECK-A2: +isa-v206-instructions
13+
// CHECK-A2-NOT: isa-v207-instructions
14+
// CHECK-A2-NOT: isa-v30-instructions
1515

16-
// CHECK-PWR7: +isa-v206-instructions
17-
// CHECK-PWR7: -isa-v207-instructions
18-
// CHECK-PWR7: -isa-v30-instructions
16+
// CHECK-PWR7: +isa-v206-instructions
17+
// CHECK-PWR7-NOT: isa-v207-instructions
18+
// CHECK-PWR7-NOT: isa-v30-instructions
1919

20-
// CHECK-PWR8: +isa-v207-instructions
21-
// CHECK-PWR8: -isa-v30-instructions
20+
// CHECK-PWR8: +isa-v207-instructions
21+
// CHECK-PWR8-NOT: isa-v30-instructions
2222

2323
// CHECK-PWR9: +isa-v207-instructions
2424
// CHECK-PWR9: +isa-v30-instructions

‎llvm/include/llvm/TargetParser/CMakeLists.txt‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,5 +7,8 @@ tablegen(LLVM AArch64TargetParserDef.inc -gen-arm-target-def -I ${PROJECT_SOURCE
77
set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/RISCV/RISCV.td)
88
tablegen(LLVM RISCVTargetParserDef.inc -gen-riscv-target-def -I ${PROJECT_SOURCE_DIR}/lib/Target/RISCV/)
99

10+
set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/PowerPC/PPC.td)
11+
tablegen(LLVM PPCGenTargetFeatures.inc -gen-target-features -I${PROJECT_SOURCE_DIR}/lib/Target/PowerPC)
12+
1013
# This covers all of the tablegen calls above.
1114
add_public_tablegen_target(target_parser_gen)

‎llvm/include/llvm/TargetParser/PPCTargetParser.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,8 @@
1414
#ifndef LLVM_TARGETPARSER_PPCTARGETPARSER_H
1515
#define LLVM_TARGETPARSER_PPCTARGETPARSER_H
1616

17+
#include "TargetParser.h"
18+
#include "llvm/ADT/StringMap.h"
1719
#include "llvm/ADT/StringRef.h"
1820
#include "llvm/Support/Compiler.h"
1921
#include "llvm/TargetParser/Triple.h"
@@ -37,6 +39,10 @@ LLVM_ABI StringRef getNormalizedPPCTuneCPU(const Triple &T,
3739
// For PPC, there are some cpu names for same CPU, like pwr10 and power10,
3840
// normalize them.
3941
LLVM_ABI StringRef normalizeCPUName(StringRef CPUName);
42+
43+
LLVM_ABI std::optional<llvm::StringMap<bool>>
44+
getPPCDefaultTargetFeatures(const Triple &T, StringRef CPUName);
45+
4046
} // namespace PPC
4147
} // namespace llvm
4248

‎llvm/include/llvm/TargetParser/TargetParser.h‎

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,8 @@
1414
#ifndef LLVM_TARGETPARSER_TARGETPARSER_H
1515
#define LLVM_TARGETPARSER_TARGETPARSER_H
1616

17+
#include "SubtargetFeature.h"
18+
#include "llvm/ADT/ArrayRef.h"
1719
#include "llvm/ADT/StringMap.h"
1820
#include "llvm/ADT/StringRef.h"
1921
#include "llvm/Support/Compiler.h"
@@ -190,6 +192,31 @@ insertWaveSizeFeature(StringRef GPU, const Triple &T,
190192
StringMap<bool> &Features);
191193

192194
} // namespace AMDGPU
195+
196+
struct BasicSubtargetFeatureKV {
197+
const char *Key; ///< K-V key string
198+
unsigned Value; ///< K-V integer value
199+
FeatureBitArray Implies; ///< K-V bit mask
200+
};
201+
202+
/// Used to provide key value pairs for feature and CPU bit flags.
203+
struct BasicSubtargetSubTypeKV {
204+
const char *Key; ///< K-V key string
205+
FeatureBitArray Implies; ///< K-V bit mask
206+
207+
/// Compare routine for std::lower_bound
208+
bool operator<(StringRef S) const { return StringRef(Key) < S; }
209+
210+
/// Compare routine for std::is_sorted.
211+
bool operator<(const BasicSubtargetSubTypeKV &Other) const {
212+
return StringRef(Key) < StringRef(Other.Key);
213+
}
214+
};
215+
216+
std::optional<llvm::StringMap<bool>>
217+
getCPUDefaultTargetFeatures(StringRef CPU,
218+
ArrayRef<BasicSubtargetSubTypeKV> ProcDesc,
219+
ArrayRef<BasicSubtargetFeatureKV> ProcFeatures);
193220
} // namespace llvm
194221

195222
#endif

0 commit comments

Comments
 (0)