Split blackbox resources into one file per module (#5073)

Author: trmckay

src/test/resources/chisel3/BlackBoxConstant.v

@@ -0,0 +1,8 @@
+module BlackBoxConstant #(
+  parameter int WIDTH=1,
+  parameter int VALUE=1
+) (
+  output [WIDTH-1:0] out
+);
+  assign out = VALUE[WIDTH-1:0];
+endmodule

src/test/resources/chisel3/BlackBoxInverter.v

@@ -0,0 +1,6 @@
+module BlackBoxInverter(
+    input  [0:0] in,
+    output [0:0] out
+);
+  assign out = !in;
+endmodule

src/test/resources/chisel3/BlackBoxMinus.v

@@ -0,0 +1,7 @@
+module BlackBoxMinus(
+    input  [15:0] in1,
+    input  [15:0] in2,
+    output [15:0] out
+);
+  assign out = in1 + in2;
+endmodule

src/test/resources/chisel3/BlackBoxPassthrough.v

@@ -0,0 +1,6 @@
+module BlackBoxPassthrough(
+    input  [0:0] in,
+    output [0:0] out
+);
+  assign out = in;
+endmodule

src/test/resources/chisel3/BlackBoxPassthrough2.v

@@ -0,0 +1,6 @@
+module BlackBoxPassthrough2(
+    input  [0:0] in,
+    output [0:0] out
+);
+  assign out = in;
+endmodule

src/test/resources/chisel3/BlackBoxRealParam.v

@@ -0,0 +1,7 @@
+module BlackBoxRealParam #(
+  parameter real REAL = 0.0
+) (
+  output [63:0] out
+);
+  assign out = $realtobits(REAL);
+endmodule

src/test/resources/chisel3/BlackBoxRegister.v

@@ -0,0 +1,11 @@
+module BlackBoxRegister(
+    input  [0:0] clock,
+    input  [0:0] in,
+    output [0:0] out
+);
+  reg [0:0] register;
+  always @(posedge clock) begin
+    register <= in;
+  end
+  assign out = register;
+endmodule

src/test/resources/chisel3/BlackBoxStringParam.v

@@ -0,0 +1,8 @@
+module BlackBoxStringParam #(
+  parameter string STRING = "zero"
+) (
+  output [31:0] out
+);
+  assign out = (STRING == "one" )? 1 :
+               (STRING == "two" )? 2 : 0;
+endmodule

src/test/resources/chisel3/BlackBoxTest.v

@@ -0,0 +1,7 @@
+module BlackBoxTypeParam #(
+  parameter type T = bit
+) (
+  output T out
+);
+  assign out = {32'hdeadbeef}[$bits(out)-1:0];
+endmodule