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Remove exploration stuff
1 parent 1f77c5d commit 91245ce

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4 files changed

+10
-138
lines changed

4 files changed

+10
-138
lines changed

esp-hal/src/analog/adc/calibration/basic.rs

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -36,13 +36,10 @@ where
3636
fn new_cal(atten: Attenuation) -> Self {
3737
// Try to get init code (Dout0) from efuse
3838
// Dout0 means mean raw ADC value when zero voltage applied to input.
39-
use defmt::println;
4039
let cal_val = ADCI::init_code(atten).unwrap_or_else(|| {
4140
// As a fallback try to calibrate via connecting input to ground internally.
42-
println!("Doing manual calibration");
4341
AdcConfig::<ADCI>::adc_calibrate(atten, AdcCalSource::Gnd)
4442
});
45-
println!("CalBasic cal_val={}", cal_val);
4643

4744
Self {
4845
cal_val,

esp-hal/src/analog/adc/calibration/line.rs

Lines changed: 1 addition & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -82,16 +82,6 @@ where
8282
// of it already.
8383
let gain = mv as u32 * GAIN_SCALE / code as u32;
8484

85-
use defmt::println;
86-
#[cfg(esp32s2)]
87-
println!(
88-
"code={} mv={} gain={} offset={}",
89-
code,
90-
mv,
91-
gain,
92-
ADCI::coeff_b(atten)
93-
);
94-
9585
Self {
9686
basic,
9787
gain,
@@ -111,17 +101,7 @@ where
111101
let transformed = val as u32 * self.gain / GAIN_SCALE;
112102

113103
#[cfg(esp32s2)]
114-
let transformed = {
115-
use defmt::println;
116-
println!(
117-
"Transforming {} -> {} + {} into {}",
118-
val,
119-
transformed,
120-
self.offset,
121-
(transformed as i32 + self.offset, 0)
122-
);
123-
i32::max(transformed as i32 + self.offset, 0)
124-
};
104+
let transformed = { i32::max(transformed as i32 + self.offset, 0) };
125105

126106
transformed as u16
127107
}

esp-hal/src/analog/adc/xtensa.rs

Lines changed: 5 additions & 102 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ use super::{AdcCalScheme, AdcCalSource, AdcChannel, AdcConfig, AdcPin, Attenuati
66
#[cfg(any(esp32s2, esp32s3))]
77
use crate::efuse::Efuse;
88
use crate::{
9-
peripherals::{APB_SARADC, I2C_ANA_MST, LPWR, SENS},
9+
peripherals::{APB_SARADC, SENS},
1010
soc::regi2c,
1111
system::{GenericPeripheralGuard, Peripheral},
1212
};
@@ -42,95 +42,29 @@ where
4242
where
4343
ADCI: super::CalibrationAccess,
4444
{
45-
let guard = GenericPeripheralGuard::<{ Peripheral::ApbSarAdc as u8 }>::new();
4645
let mut adc_max: u16 = 0;
4746
let mut adc_min: u16 = u16::MAX;
4847
let mut adc_sum: u32 = 0;
4948

5049
ADCI::enable_vdef(true);
5150

52-
let sensors = SENS::regs();
53-
unsafe {
54-
// sensors
55-
//.sar_meas2_mux()
56-
//.write(|w| w.sar2_pwdet_cct().bits(4));
57-
}
58-
59-
ADCI::clear_dig_force();
60-
ADCI::set_start_force();
61-
ADCI::set_en_pad_force();
62-
sensors
63-
.sar_hall_ctrl()
64-
.modify(|_, w| w.xpd_hall_force().set_bit());
65-
sensors
66-
.sar_hall_ctrl()
67-
.modify(|_, w| w.hall_phase_force().set_bit());
68-
69-
// Set power to SW power on
70-
#[cfg(esp32s2)]
71-
sensors
72-
.sar_meas1_ctrl1()
73-
.modify(|_, w| w.rtc_saradc_clkgate_en().set_bit());
74-
75-
#[cfg(esp32s3)]
76-
sensors
77-
.sar_peri_clk_gate_conf()
78-
.modify(|_, w| w.saradc_clk_en().set_bit());
79-
80-
sensors
81-
.sar_power_xpd_sar()
82-
.modify(|_, w| w.sarclk_en().set_bit());
83-
84-
sensors
85-
.sar_power_xpd_sar()
86-
.modify(|_, w| unsafe { w.force_xpd_sar().bits(0b11) });
87-
88-
// disable AMP
89-
sensors
90-
.sar_meas1_ctrl1()
91-
.modify(|_, w| unsafe { w.force_xpd_amp().bits(0b11) });
92-
sensors
93-
.sar_amp_ctrl3()
94-
.modify(|_, w| unsafe { w.amp_rst_fb_fsm().bits(0) });
95-
sensors
96-
.sar_amp_ctrl3()
97-
.modify(|_, w| unsafe { w.amp_short_ref_fsm().bits(0) });
98-
sensors
99-
.sar_amp_ctrl3()
100-
.modify(|_, w| unsafe { w.amp_short_ref_gnd_fsm().bits(0) });
101-
sensors
102-
.sar_amp_ctrl1()
103-
.modify(|_, w| unsafe { w.sar_amp_wait1().bits(1) });
104-
sensors
105-
.sar_amp_ctrl1()
106-
.modify(|_, w| unsafe { w.sar_amp_wait2().bits(1) });
107-
sensors
108-
.sar_amp_ctrl2()
109-
.modify(|_, w| unsafe { w.sar_amp_wait3().bits(1) });
110-
11151
// Start sampling
11252
ADCI::set_en_pad(ADCI::ADC_CAL_CHANNEL as u8);
113-
// ADCI::clear_en_pad();
11453
ADCI::set_attenuation(ADCI::ADC_CAL_CHANNEL as usize, atten as u8);
11554

11655
// Connect calibration source
117-
// ADCI::connect_cal(source, true);
56+
ADCI::connect_cal(source, true);
11857

11958
ADCI::set_init_code(0);
12059

12160
for _ in 0..ADCI::ADC_CAL_CNT_MAX {
122-
ADCI::clear_start_sample();
12361
// Trigger ADC sampling
12462
ADCI::start_sample();
12563

12664
// Wait until ADCI sampling is done
12765
while !ADCI::is_done() {}
12866

129-
let adc = ADCI::read_data();
130-
use defmt::println;
131-
println!("Calibration read {} -> {}", adc, adc & ADCI::ADC_VAL_MASK);
132-
133-
let adc = adc & ADCI::ADC_VAL_MASK;
67+
let adc = ADCI::read_data() & ADCI::ADC_VAL_MASK;
13468

13569
ADCI::reset();
13670

@@ -142,9 +76,6 @@ where
14276
let cal_val =
14377
(adc_sum - adc_max as u32 - adc_min as u32) as u16 / (ADCI::ADC_CAL_CNT_MAX - 2);
14478

145-
use defmt::println;
146-
println!("Calibration result {}", cal_val);
147-
14879
// Disconnect calibration source
14980
ADCI::connect_cal(source, false);
15081

@@ -163,7 +94,6 @@ pub trait RegisterAccess {
16394
fn set_en_pad_force();
16495

16596
fn set_en_pad(channel: u8);
166-
fn clear_en_pad();
16797

16898
fn clear_start_sample();
16999

@@ -215,11 +145,6 @@ impl RegisterAccess for crate::peripherals::ADC1<'_> {
215145
.sar_meas1_ctrl2()
216146
.modify(|_, w| unsafe { w.sar1_en_pad().bits(1 << channel) });
217147
}
218-
fn clear_en_pad() {
219-
SENS::regs()
220-
.sar_meas1_ctrl2()
221-
.modify(|_, w| unsafe { w.sar1_en_pad().bits(0) });
222-
}
223148

224149
fn clear_start_sample() {
225150
SENS::regs()
@@ -252,19 +177,6 @@ impl RegisterAccess for crate::peripherals::ADC1<'_> {
252177
fn set_init_code(data: u16) {
253178
let [msb, lsb] = data.to_be_bytes();
254179

255-
use defmt::println;
256-
println!("Writing {} HIGH={} LOW={}", data, msb, lsb);
257-
258-
LPWR::regs().ana_conf().modify(|_, w| {
259-
w.sar_i2c_force_pd().clear_bit();
260-
w.sar_i2c_force_pu().set_bit()
261-
});
262-
I2C_ANA_MST::regs()
263-
.config1()
264-
.modify(|_, w| w.sar().clear_bit());
265-
I2C_ANA_MST::regs()
266-
.config0()
267-
.modify(|_, w| w.sar_cfg2().set_bit());
268180
regi2c::ADC_SAR1_INITIAL_CODE_HIGH.write_field(msb);
269181
regi2c::ADC_SAR1_INITIAL_CODE_LOW.write_field(lsb);
270182
}
@@ -338,11 +250,6 @@ impl RegisterAccess for crate::peripherals::ADC2<'_> {
338250
.sar_meas2_ctrl2()
339251
.modify(|_, w| unsafe { w.sar2_en_pad().bits(1 << channel) });
340252
}
341-
fn clear_en_pad() {
342-
SENS::regs()
343-
.sar_meas2_ctrl2()
344-
.modify(|_, w| unsafe { w.sar2_en_pad().bits(0) });
345-
}
346253

347254
fn clear_start_sample() {
348255
SENS::regs()
@@ -515,8 +422,6 @@ where
515422

516423
// Get converted value
517424
let converted_value = ADCI::read_data();
518-
use defmt::println;
519-
println!("Actual raw={}", converted_value);
520425
ADCI::reset();
521426

522427
// Postprocess converted value according to calibration scheme used for pin
@@ -574,17 +479,15 @@ where
574479
PIN: AdcChannel,
575480
CS: AdcCalScheme<ADCI>,
576481
{
577-
ADCI::set_en_pad(PIN::CHANNEL);
578-
579482
// Set ADC unit calibration according used scheme for pin
580483
let init_code = pin.cal_scheme.adc_cal();
581484
if self.last_init_code != init_code {
582-
use defmt::println;
583-
println!("Setting init_code = {}", init_code);
584485
ADCI::set_init_code(init_code);
585486
self.last_init_code = init_code;
586487
}
587488

489+
ADCI::set_en_pad(PIN::CHANNEL);
490+
588491
ADCI::clear_start_sample();
589492
ADCI::start_sample();
590493
}

esp-hal/src/soc/esp32s2/regi2c.rs

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -196,26 +196,18 @@ pub(crate) fn regi2c_read(block: u8, _host_id: u8, reg_add: u8) -> u8 {
196196
I2C_ANA_MST::regs().config2().read().data().bits()
197197
}
198198

199-
pub(crate) fn regi2c_write(block: u8, host_id: u8, reg_add: u8, data: u8) {
200-
use defmt::println;
199+
pub(crate) fn regi2c_write(block: u8, _host_id: u8, reg_add: u8, data: u8) {
201200
i2c_rtc_enable_block(block);
202201

203-
I2C_ANA_MST::regs().config2().write(|w| unsafe {
204-
let v = w
205-
.slave_id()
202+
I2C_ANA_MST::regs().config2().modify(|_, w| unsafe {
203+
w.slave_id()
206204
.bits(block)
207205
.addr()
208206
.bits(reg_add)
209207
.wr_cntl()
210208
.bit(true)
211209
.data()
212-
.bits(data);
213-
214-
println!(
215-
"regi2c_write({=u8:#x}, {=u8:#x}, {=u8:#x}, {=u8:#x}) = {=u32:#x}",
216-
block, host_id, reg_add, data, v.bits
217-
);
218-
v
210+
.bits(data)
219211
});
220212

221213
while I2C_ANA_MST::regs().config2().read().busy().bit_is_set() {}

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