@@ -24,17 +24,20 @@ pub(crate) struct PciConfigRegion(VirtAddr);
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impl PciConfigRegion {
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pub const fn new ( addr : VirtAddr ) -> Self {
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- assert ! ( addr. as_u64( ) & 0xFFFFFFF == 0 , "Unaligned PCI Config Space" ) ;
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+ assert ! (
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+ addr. as_u64( ) & 0x0fff_ffff == 0 ,
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+ "Unaligned PCI Config Space"
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+ ) ;
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Self ( addr)
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}
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#[ inline]
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fn addr_from_offset ( & self , pci_addr : PciAddress , offset : u16 ) -> usize {
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- assert ! ( offset & 0xF000 == 0 , "Invalid offset" ) ;
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+ assert ! ( offset & 0xf000 == 0 , "Invalid offset" ) ;
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( u64:: from ( pci_addr. bus ( ) ) << 20
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| u64:: from ( pci_addr. device ( ) ) << 15
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| u64:: from ( pci_addr. function ( ) ) << 12
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- | ( u64:: from ( offset) & 0xFFF )
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+ | ( u64:: from ( offset) & 0xfff )
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| self . 0 . as_u64 ( ) ) as usize
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}
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}
@@ -246,7 +249,7 @@ pub fn init() {
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let size = u64:: from_be_bytes ( slice. try_into ( ) . unwrap ( ) ) ;
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let pci_address =
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- virtualmem:: allocate_aligned ( size. try_into ( ) . unwrap ( ) , 0x10000000 ) . unwrap ( ) ;
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+ virtualmem:: allocate_aligned ( size. try_into ( ) . unwrap ( ) , 0x1000_0000 ) . unwrap ( ) ;
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info ! ( "Mapping PCI Enhanced Configuration Space interface to virtual address {:p} (size {:#X})" , pci_address, size) ;
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let mut flags = PageTableEntryFlags :: empty ( ) ;
@@ -268,8 +271,8 @@ pub fn init() {
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assert ! ( mem64_start > 0 ) ;
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let max_bus_number = size
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- / ( PCI_MAX_DEVICE_NUMBER as u64
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- * PCI_MAX_FUNCTION_NUMBER as u64
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+ / ( u64:: from ( PCI_MAX_DEVICE_NUMBER )
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+ * u64:: from ( PCI_MAX_FUNCTION_NUMBER )
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* BasePageSize :: SIZE ) ;
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info ! ( "Scanning PCI Busses 0 to {}" , max_bus_number - 1 ) ;
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@@ -299,12 +302,12 @@ pub fn init() {
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cmd |= CommandRegister :: IO_ENABLE
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| CommandRegister :: BUS_MASTER_ENABLE ;
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}
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- // Currently, we ignore 32 bit memory bars
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- /*Bar::Memory32 { address, size, prefetchable } => {
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- dev.set_bar(i.try_into().unwrap(), Bar::Memory32 { address: mem32_start.try_into().unwrap(), size, prefetchable });
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- mem32_start += u64::from(size);
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- cmd |= CommandRegister::MEMORY_ENABLE | CommandRegister::BUS_MASTER_ENABLE;
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- }*/
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+ Bar :: Memory32 { .. } => {
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+ // Currently, we ignore 32 bit memory bars
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+ // dev.set_bar(i.try_into().unwrap(), Bar::Memory32 { address: mem32_start.try_into().unwrap(), size, prefetchable });
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+ // mem32_start += u64::from(size);
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+ // cmd |= CommandRegister::MEMORY_ENABLE | CommandRegister::BUS_MASTER_ENABLE;
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+ }
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Bar :: Memory64 {
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address : _,
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size,
@@ -322,7 +325,6 @@ pub fn init() {
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cmd |= CommandRegister :: MEMORY_ENABLE
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| CommandRegister :: BUS_MASTER_ENABLE ;
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}
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- _ => { }
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}
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}
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}
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