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BirchStream FSP (0041D92)
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‎BirchStreamFspBinPkg/ap/Fsp.fd

5.5 MB
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‎BirchStreamFspBinPkg/ap/Include/CxlNodeHob.h

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/** @file
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or
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other materials provided with the distribution.
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* Neither the name of Intel Corporation nor the names of its contributors may
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be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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THE POSSIBILITY OF SUCH DAMAGE.
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This file is automatically generated. Please do NOT modify !!!
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**/
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#ifndef _CXL_NODE_HOB_
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#define _CXL_NODE_HOB_
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#define CXL_NODE_HOB_GUID { 0xdd8ae009, 0xda5a, 0x44a3, { 0xbe, 0x18, 0xda, 0x0c, 0x16, 0xc5, 0xaf, 0x5c } }
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#ifndef MAX_IIO_STACK
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#define MAX_IIO_STACK 16
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#endif
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#ifndef MAX_CXL_HDM_RANGES
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#define MAX_CXL_HDM_RANGES 0x2 // Maximum number of CXL HDM ranges per CXL end device.
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#endif
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#ifndef MAX_CXL_PER_SOCKET
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#define MAX_CXL_PER_SOCKET MAX_IIO_STACK
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#endif
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#define CXL_NODE_ATTR_MEM BIT0
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#define CXL_NODE_ATTR_PERSISTENT BIT1
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#define CXL_NODE_ATTR_MEM_HW_INIT BIT2
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#define CXL_NODE_ATTR_ACCELERATOR BIT3
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#define CXL_NODE_ATTR_HOT_PLUGGABLE BIT4
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typedef UINT32 CXL_NODE_ATTR;
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#pragma pack(1)
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//
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// CDAT DSEMTS EFI Memory Type and Attribute
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//
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typedef enum {
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CxlEfiConventionalMemory = 0x0,
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CxlEfiConventionalMemorySp = 0x1,
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CxlEfiReservedMemoryType = 0x2,
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MaxCxlEfiMemType
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} CXL_EFI_MEM_TYPE;
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typedef struct {
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UINT32 RdLatency;
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UINT32 WrLatency;
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UINT32 RdBandwidth;
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UINT32 WrBandwidth;
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} CXL_PERF_DATA;
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typedef struct {
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UINT64 SerialNumber;
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UINT16 VendorId;
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CXL_NODE_ATTR Attr;
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UINT32 Address;
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UINT32 Size;
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UINT8 Ways;
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UINT8 SocketBitmap;
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BOOLEAN AcpiSratSpMemFlag;
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CXL_EFI_MEM_TYPE EfiMemType;
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CXL_PERF_DATA InitiatorPerfData; // Performance data between device egress and initiator.
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CXL_PERF_DATA TargetPerfData; // Performance data of entire target memory region.
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CXL_PERF_DATA InitiatorTargetPerfData; // performance data between initiator and the device memory.
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} CXL_NODE_INFO;
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typedef struct {
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UINT8 CxlNodeCount;
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//
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// CXL node info for UEFI memory map and ACPI tables construction
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//
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CXL_NODE_INFO CxlNodeInfo[MAX_IIO_STACK * MAX_CXL_HDM_RANGES];
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} CXL_NODE_SOCKET;
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#pragma pack()
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#endif //#ifndef _CXL_NODE_HOB_

‎BirchStreamFspBinPkg/ap/Include/FspAcpiHobs.h

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/** @file
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or
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other materials provided with the distribution.
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* Neither the name of Intel Corporation nor the names of its contributors may
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be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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THE POSSIBILITY OF SUCH DAMAGE.
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This file is automatically generated. Please do NOT modify !!!
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**/
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#ifndef __FSP_ACPI_HOBS__
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#define __FSP_ACPI_HOBS__
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//Typecast HOB pointer to APEI table structure of ACPI version 6.2
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#define FSP_RAS_ACPI_HOB_GUID { 0x826785ee, 0xa8e0, 0x4d8f, { 0x82, 0x6f, 0x54, 0x29, 0x2c, 0xe7, 0x6f, 0xe6 } }
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//Typecast HOB pointer to ACPI CXL CEDT table structure
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#define FSP_CXL_CEDT_ACPI_HOB_GUID { 0x5CB7A12A, 0x8B2D, 0x485A, { 0xB7, 0x04, 0xC0, 0x52, 0x49, 0x56, 0x81, 0xE7 } }
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// Typecast HOB pointer to MEM_TRAINING_DATA_HOB_HEADER.
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// User with NDA clearance should refer to RC code for latest structure definition.
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#define FSP_MEM_TRAINING_DATA_HOB_GUID { 0x7e8b89e2, 0x8b84, 0x4cb3, { 0x86, 0x8f, 0x10, 0xb6, 0x78, 0x71, 0xa2, 0xc0 }}
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// Typecast HOB pointer to EWL_PRIVATE_DATA.
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// User with NDA clearance should refer to RC code for latest structure definition.
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#define FSP_EWL_ID_HOB_GUID { 0xd8e05800, 0x5e, 0x4462, { 0xaa, 0x3d, 0x9c, 0x6b, 0x47, 0x4, 0x92, 0xb } };
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//Typecast HOB pointer to RAS_ACPI_PARAM_HOB_DATA;
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#define RAS_ACPI_PARAM_HOB_GUID {0x594dfe5c, 0x7a87, 0x49dc, { 0x8f, 0x33, 0xea, 0x83, 0x4d, 0x6f, 0x18, 0x90 } }
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#endif // __FSP_ACPI_HOBS__

‎BirchStreamFspBinPkg/ap/Include/FspEdpcParam.h

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/** @file
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
11+
list of conditions and the following disclaimer in the documentation and/or
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other materials provided with the distribution.
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* Neither the name of Intel Corporation nor the names of its contributors may
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be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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THE POSSIBILITY OF SUCH DAMAGE.
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This file is automatically generated. Please do NOT modify !!!
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**/
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#ifndef __FSP_EDPC_PARAM__
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#define __FSP_EDPC_PARAM__
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#pragma pack(1)
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typedef struct {
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UINT8 Segment;
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UINT8 Bus;
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UINT8 Device;
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UINT8 Function;
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} EDPC_DEV_INFO;
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typedef struct {
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//
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// There are three possible statuses of Valid infomation
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// EPDC_INFO_VALID, EDPC_INFO_NOTIFIED, EDPC_INFO_CLEARED
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//
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UINT8 Valid;
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EDPC_DEV_INFO EdpcTrigger;
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EDPC_DEV_INFO EdpcRootPort;
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UINT8 NotifyType;
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} EDPC_INFO;
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typedef struct {
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UINT16 OsNativeAerSupport;
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UINT16 Reserved;
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UINT64 Reserved1[400];
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EDPC_INFO EdpcInfo;
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UINT64 EmcaL1DirAddr;
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UINT8 EmcaEn;
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UINT8 ElogEn;
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UINT8 WheaEnabled;
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UINT8 WheaSupportEn;
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UINT64 ReadAckAddress;
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UINT64 OobReadAckAddress;
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UINT32 SoftwareSmi;
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} RAS_ACPI_PARAM;
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#pragma pack()
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#endif // __FSP_EDPC_PARAM__

‎BirchStreamFspBinPkg/ap/Include/FspErrorInfoHob.h

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/** @file
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
11+
list of conditions and the following disclaimer in the documentation and/or
12+
other materials provided with the distribution.
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* Neither the name of Intel Corporation nor the names of its contributors may
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be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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THE POSSIBILITY OF SUCH DAMAGE.
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This file is automatically generated. Please do NOT modify !!!
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**/
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#ifndef _FSP_ERROR_INFO_HOB_H_
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#define _FSP_ERROR_INFO_HOB_H_
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///
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/// GUID value indicating the FSP error information.
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///
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#define FSP_ERROR_INFO_HOB_GUID { 0x611e6a88, 0xadb7, 0x4301, { 0x93, 0xff, 0xe4, 0x73, 0x04, 0xb4, 0x3d, 0xa6 } }
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#define FSP_ERROR_INFO_STATUS_CODE_TYPE (EFI_ERROR_CODE | EFI_ERROR_UNRECOVERED)
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///
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/// FSP Error Information Block.
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///
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#pragma pack(1)
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typedef struct {
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///
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/// GUID HOB header.
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///
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EFI_HOB_GUID_TYPE GuidHob;
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///
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/// ReportStatusCode () type identifier.
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///
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EFI_STATUS_CODE_TYPE Type;
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///
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/// ReportStatusCode () value.
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///
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EFI_STATUS_CODE_VALUE Value;
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///
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/// ReportStatusCode () Instance number.
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///
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UINT32 Instance;
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///
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/// Optional GUID which may be used to identify
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/// which internal component of the FSP was
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/// executing at the time of the error.
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///
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EFI_GUID CallerId;
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///
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/// GUID identifying the nature of the fatal error.
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///
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EFI_GUID ErrorType;
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///
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/// EFI_STATUS code describing the error encountered.
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///
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UINT32 Status;
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} FSP_ERROR_INFO_HOB;
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#pragma pack()
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#endif //_FSP_ERROR_INFO_H_

‎BirchStreamFspBinPkg/ap/Include/FspExtMemoryPprHob.h

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/** @file
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
7+
8+
* Redistributions of source code must retain the above copyright notice, this
9+
list of conditions and the following disclaimer.
10+
* Redistributions in binary form must reproduce the above copyright notice, this
11+
list of conditions and the following disclaimer in the documentation and/or
12+
other materials provided with the distribution.
13+
* Neither the name of Intel Corporation nor the names of its contributors may
14+
be used to endorse or promote products derived from this software without
15+
specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20+
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23+
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24+
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25+
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26+
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27+
THE POSSIBILITY OF SUCH DAMAGE.
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This file is automatically generated. Please do NOT modify !!!
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**/
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#ifndef _FSP_EXT_MEMORY_PPR_HOB_H_
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#define _FSP_EXT_MEMORY_PPR_HOB_H_
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#include "FspGlobals.h"
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#define FSP_EXT_MEMORY_PPR_HOB_GUID { 0x3956C6DA, 0x35B6, 0x4036, { 0x93, 0xE4, 0xB1, 0x51, 0x38, 0x60, 0x21, 0x1E } }
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#pragma pack(1)
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typedef struct FspExtPprAddr {
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UINT8 Status;
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UINT8 ErrorType;
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UINT8 Socket;
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UINT8 MemoryController;
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UINT8 Channel;
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UINT8 Dimm;
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UINT8 Bank;
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UINT32 Row;
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UINT8 Rank;
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} FSP_EXT_PPR_ADDR;
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typedef struct FspExtPprDdrInfo {
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UINT8 Count;
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FSP_EXT_PPR_ADDR PprAddresses[FSP_MAX_PPR_ADDR_ENTRIES_DDR];
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} FSP_EXT_DDR_PPR_INFO;
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typedef struct FspExtMemoryPprData {
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FSP_EXT_DDR_PPR_INFO DdrPprInfo;
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} FSP_EXT_MEMORY_PPR_DATA;
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typedef struct FspExtMemoryPprHob {
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FSP_EXT_HEADER Header;
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FSP_EXT_MEMORY_PPR_DATA Data;
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} FSP_EXT_MEMORY_PPR_HOB;
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#pragma pack()
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#endif // _FSP_EXT_MEMORY_PPR_HOB_H_

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