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mtargowssys_zuul
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DWARF debugger location expressions fixes
Change-Id: Ic439701acd90c8e3f9f432172b80cab6296d429d
1 parent 67bb9dc commit 9bd90e4

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+34
-5
lines changed

1 file changed

+34
-5
lines changed

IGC/Compiler/DebugInfo/DwarfCompileUnit.cpp

Lines changed: 34 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -902,6 +902,8 @@ void CompileUnit::addScratchLocation(DIEBlock* Block, DbgDecoder::VarInfo* varIn
902902
{
903903
uint32_t offset = varInfo->lrs.front().getSpillOffset().memoryOffset + vectorOffset;
904904

905+
IGC_ASSERT_MESSAGE(IGC_IS_FLAG_ENABLED(EnableSIMDLaneDebugging), "SIMD lane expressions support only");
906+
905907
if (IGC_IS_FLAG_ENABLED(EnableGTLocationDebugging))
906908
{
907909
// For spills to the scratch area at offset available as literal
@@ -911,7 +913,7 @@ void CompileUnit::addScratchLocation(DIEBlock* Block, DbgDecoder::VarInfo* varIn
911913
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_bregx);
912914
addUInt(Block, dwarf::DW_FORM_udata, scratchBaseAddr); // Base address of surface or sampler
913915
addSInt(Block, dwarf::DW_FORM_sdata, offset); // Offset to base address
914-
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_deref);
916+
// DW_OP_deref moved to the end of SIMD lane snippet
915917
}
916918
else
917919
{
@@ -920,7 +922,7 @@ void CompileUnit::addScratchLocation(DIEBlock* Block, DbgDecoder::VarInfo* varIn
920922

921923
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_const8u);
922924
addUInt(Block, dwarf::DW_FORM_data8, addr.GetAddress());
923-
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_deref);
925+
// DW_OP_deref moved to the end of SIMD lane snippet
924926
}
925927
}
926928

@@ -940,6 +942,30 @@ void CompileUnit::addSLMLocation(DIEBlock* Block, VISAVariableLocation* Loc)
940942

941943
// addSimdLane - add a sequence of attributes to calculate location of vectorized variable
942944
// among SIMD lanes, e.g. a GRF subregister.
945+
//
946+
// Example of expression generated for 32-bit variables located in GRF:
947+
// (note: DW_OP_regx N is generated earlier, i.e. prior to addSimdLane())
948+
// DW_OP_INTEL_push_simd_lane
949+
// DW_OP_lit5
950+
// DW_OP_shl
951+
// DW_OP_const1u 32
952+
// DW_OP_INTEL_bit_piece_stack
953+
//
954+
// Example of expression generated for 64-bit variable, which is located in memory:
955+
// (note: DW_OP_bregx N is generated earlier)
956+
// DW_OP_INTEL_push_simd_lane
957+
// DW_OP_lit6
958+
// DW_OP_shl
959+
// DW_OP_plus
960+
// (note: no deref is emitted for bregx)
961+
962+
// Example of expression generated for (64-bit) ptr to a variable, which is located in scratch:
963+
// (note: DW_OP_const8u address is generated earlier)
964+
// DW_OP_INTEL_push_simd_lane
965+
// DW_OP_lit6
966+
// DW_OP_shl
967+
// DW_OP_plus
968+
// DW_OP_deref
943969
void CompileUnit::addSimdLane(DIEBlock* Block, DbgVariable& DV, VISAVariableLocation *Loc, bool isPacked)
944970
{
945971
if (IGC_IS_FLAG_ENABLED(EnableSIMDLaneDebugging) && Loc->IsVectorized())
@@ -1024,7 +1050,12 @@ void CompileUnit::addSimdLane(DIEBlock* Block, DbgVariable& DV, VISAVariableLoca
10241050
else
10251051
{
10261052
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_plus);
1027-
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_deref);
1053+
1054+
// Emit deref for const8u address not for bregx
1055+
if (!isa<llvm::DbgDeclareInst>(DV.getDbgInst()))
1056+
{
1057+
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_deref);
1058+
}
10281059
}
10291060
}
10301061
}
@@ -2040,9 +2071,7 @@ void CompileUnit::buildSLM(DbgVariable& var, DIE* die, VISAVariableLocation* loc
20402071

20412072
Address addr;
20422073
addr.Set(Address::Space::eLocal, 0, offset);
2043-
20442074
addUInt(Block, dwarf::DW_FORM_data1, dwarf::DW_OP_const8u);
2045-
20462075
addUInt(Block, dwarf::DW_FORM_data8, addr.GetAddress());
20472076
}
20482077
else

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