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small cleanup of accumulator related code
Change-Id: I11dbdc8d9289e3dafba93f8584a2780a8b3fea2c
1 parent a51af24 commit 9f79411

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5 files changed

+63
-61
lines changed

5 files changed

+63
-61
lines changed

visa/BinaryEncodingIGA.cpp

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,58 @@ mem(m), kernel(k), fileName(fname), m_kernelBuffer(nullptr), m_kernelBufferSize(
7070
IGAKernel = new iga::Kernel(*platformModel);
7171
}
7272

73+
iga::InstOptSet BinaryEncodingIGA::getIGAInstOptSet(G4_INST* inst) const
74+
{
75+
iga::InstOptSet options;
76+
77+
if (inst->isAccWrCtrlInst() && kernel.fg.builder->encodeAccWrEn())
78+
{
79+
options.add(iga::InstOpt::ACCWREN);
80+
}
81+
if (inst->isAtomicInst())
82+
{
83+
options.add(iga::InstOpt::ATOMIC);
84+
}
85+
if (inst->isBreakPointInst())
86+
{
87+
options.add(iga::InstOpt::BREAKPOINT);
88+
}
89+
if (inst->isNoDDChkInst())
90+
{
91+
options.add(iga::InstOpt::NODDCHK);
92+
}
93+
if (inst->isNoDDClrInst())
94+
{
95+
options.add(iga::InstOpt::NODDCLR);
96+
}
97+
if (inst->isNoPreemptInst())
98+
{
99+
options.add(iga::InstOpt::NOPREEMPT);
100+
}
101+
if (inst->isYieldInst())
102+
{
103+
options.add(iga::InstOpt::SWITCH);
104+
}
105+
if (inst->isSend())
106+
{
107+
if (inst->isEOT())
108+
{
109+
options.add(iga::InstOpt::EOT);
110+
}
111+
if (inst->isNoSrcDepSet())
112+
{
113+
options.add(iga::InstOpt::NOSRCDEPSET);
114+
}
115+
}
116+
if (inst->isNoCompactedInst())
117+
{
118+
options.add(iga::InstOpt::NOCOMPACT);
119+
}
120+
121+
return options;
122+
}
123+
124+
73125
void BinaryEncodingIGA::FixInst()
74126
{
75127
for (auto bb : kernel.fg.BBs)

visa/BinaryEncodingIGA.h

Lines changed: 1 addition & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -331,56 +331,7 @@ class BinaryEncodingIGA
331331
return iga::ImmVal::UNDEF;
332332
}
333333
}
334-
iga::InstOptSet getIGAInstOptSet(G4_INST* inst) const
335-
{
336-
iga::InstOptSet options;
337-
338-
if (inst->isAccWrCtrlInst())
339-
{
340-
options.add(iga::InstOpt::ACCWREN);
341-
}
342-
if (inst->isAtomicInst())
343-
{
344-
options.add(iga::InstOpt::ATOMIC);
345-
}
346-
if (inst->isBreakPointInst())
347-
{
348-
options.add(iga::InstOpt::BREAKPOINT);
349-
}
350-
if (inst->isNoDDChkInst())
351-
{
352-
options.add(iga::InstOpt::NODDCHK);
353-
}
354-
if (inst->isNoDDClrInst())
355-
{
356-
options.add(iga::InstOpt::NODDCLR);
357-
}
358-
if (inst->isNoPreemptInst())
359-
{
360-
options.add(iga::InstOpt::NOPREEMPT);
361-
}
362-
if (inst->isYieldInst())
363-
{
364-
options.add(iga::InstOpt::SWITCH);
365-
}
366-
if (inst->isSend())
367-
{
368-
if (inst->isEOT())
369-
{
370-
options.add(iga::InstOpt::EOT);
371-
}
372-
if (inst->isNoSrcDepSet())
373-
{
374-
options.add(iga::InstOpt::NOSRCDEPSET);
375-
}
376-
}
377-
if (inst->isNoCompactedInst())
378-
{
379-
options.add(iga::InstOpt::NOCOMPACT);
380-
}
381-
382-
return options;
383-
}
334+
iga::InstOptSet getIGAInstOptSet(G4_INST* inst) const;
384335

385336
iga::SendDescArg getIGASendDescArg(G4_INST* sendInst) const;
386337
iga::SendDescArg getIGASendExDescArg(G4_INST* sendInst) const;

visa/Gen4_IR.cpp

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3464,11 +3464,6 @@ G4_INST::emit_options(std::ostream& output)
34643464
tmpOption |= InstOpt_EOT;
34653465
}
34663466

3467-
// must set AccWrCtrl explicitly in GT+
3468-
if( isAccWrCtrlInst() || (isFlowControl() && asCFInst()->isBackward()) ) {
3469-
tmpOption |= InstOpt_AccWrCtrl;
3470-
}
3471-
34723467
//emit mask option
34733468
output << "{";
34743469
switch (getMaskOffset())
@@ -4409,9 +4404,9 @@ void G4_DstRegRegion::computeLeftBound()
44094404
else if ( base != NULL && base->isAccReg())
44104405
{
44114406
left_bound = subRegOff * G4_Type_Table[type].byteSize;
4412-
if( base->asAreg()->getArchRegType() == AREG_ACC1 || regOff == 1 )
4407+
if (base->asAreg()->getArchRegType() == AREG_ACC1 || regOff == 1)
44134408
{
4414-
left_bound += 32; // TODO: size of ACC is assumed to be 32 BYTEs.
4409+
left_bound += getGRFSize();
44154410
}
44164411
byteOffset = left_bound;
44174412
} else if( top_dcl ){

visa/HWCapsOpen.inc

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -473,4 +473,10 @@
473473
return 4;
474474
}
475475

476+
bool encodeAccWrEn() const
477+
{
478+
return true;
479+
}
480+
481+
476482
// end HW capabilities

visa/HWConformity.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5406,12 +5406,10 @@ void HWConformity::fixSADA2Inst( BB_LIST_ITER it )
54065406

54075407
// make sure there are no instructions between the sada2's new location
54085408
// and the src2-defining instruction that updates acc
5409-
for( INST_LIST_ITER iter = newSada2Iter; *iter != src2Dst; --iter )
5409+
for (auto iter = newSada2Iter; *iter != src2Dst; --iter)
54105410
{
54115411
G4_INST* aInst = *iter;
5412-
if( aInst->isAccDstInst() || aInst->isAccWrCtrlInst() ||
5413-
( aInst->opcode() == G4_mulh &&
5414-
IS_DTYPE(aInst->getSrc(0)->getType()) && IS_DTYPE(aInst->getSrc(1)->getType()) ) )
5412+
if (aInst->hasACCOpnd())
54155413
{
54165414
canDoSada2 = false;
54175415
break;

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