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Releases: intel/intel-graphics-compiler

igc-1.0.5585

24 Nov 14:51
@mbelicki mbelicki
igc-1.0.5585
596c86f
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igc-1.0.5585

Fixed Issues / Improvements

  • Update CheckInstrTypes pass to provide more detailed statistics wrt. the global memory and storage buffer accesses.
  • Add option to split evaluate messages
  • AdaptorCM should provide access to DyLib wrapper
  • IMF: unify trigonometry tables
  • Add switch to jump table lowering
  • Enable GAS resolution for arguments When we can prove that pointer coming from kernel function arguments is not changed inside the kernel, we assume that it points to global address space
  • Pick UD visa type for function pointers
  • Add rotate pattern
  • Remove split of arithmetic insts in CISACodeGen. Inst split is handled by vISA.
  • Fix predicates passing thru indirect calls
  • GenXBackendData refactoring
  • introduce an environment variable to pass extra arguments to CM FE
  • Load CMFE using driver path on windows
  • Add translation of FPFastMathMode decorations in SPIRVReader. This is a port of KhronosGroup/SPIRV-LLVM-Translator@14e2c5f .
  • Force inlining on stack call functions with implicit arguments.
  • IGA: Fix mov with label instructions. Do not compact them.
  • ZEBinWriter: fix variables init order
  • Fix issue on zext with i1 src type not recognized as supported in PeepholeLegalizer
  • Added opportunity to initialize GenXBackendData in a debug scenario. -vc-ocl-generic-bif-path was added to pass BiF file to backend.
  • Check for int64 moves at the end of HWConformity for platforms without int64.
  • Reduce a count of rd/wr region sequence generated during shufflevector lowering
  • Change reduce implementation to remove extra barriers
  • Pass down DebugLocation of SPIR-V builtins to LLVM-IR
  • Emulation routines for pointer compare and converts
  • Fix bitwidth for svm atomic instructions
  • Make flushL3 parameter compile time constant to avoid crash in emitMemoryFence
  • Preserve debug info for subgroup barrier with -O0.
  • Pre-increment switchjmp index operand on TGL.
  • Limit RA iteraitons before we switch to failSafe RA.
  • Refactoring code related cisa alignment to avoid potential bug
  • Add ashr and fix trunc bug in peephole legalizer. We currently need to ensure we are handling ashr when it is between i1 and i64 and not a supported type
  • Fix condition that turns remat off.
  • Added environment variables to set API/Internal Options for VC
  • Due to incorrect scoreboarding, flags registers were being stored as
  • Change vISA to use a table-based scheme to manage platforms.
  • Introduction of new entry in IGC constant folder for fbh_shi.
  • Fixed function signature cloning for argument attributes
  • Introduction of new entry in IGC constant folder for fbh.
  • Add new patch token with stateless access
  • Consider SIMD mask while constfolding
  • Remove the indirect call variable size checking in RA
  • Add method to do sampler splits SIMD8/16 sampler to odd and even subspans
  • Allow various architecture register functions to be used in release driver.
  • Make ternary instruction operand GRF-aligned
  • Set CISA offset correctly when transforming goto/join to if/else/endif.
  • update calling conv only for imported from BiF funcs in VC
  • Fix computation of CFA, return address location, callee save GRF
  • memset lowering improvements in VC
  • Constrain name string length to be 256 as per spec.
  • Fix bug on linear scan RA for stack call
  • Revert of change: 242d131 Internal feature
  • Disable scheduler when compiling without optimizations.
  • Remove some dead functions
  • Fix nested stack calls corrupting the ARG register - Only apply optimization to alias the ARG register for leaf functions, since they do not further write to ARG. - Non-leaf functions still requires copying the ARGs to a temp register at function entry.
  • Enable recursion and convert all recursive calls to stack calls
  • Support function pointer arguments passing thru SVM
  • fix align wrapper for unset alignment in CMPacketize

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.5435

13 Nov 14:27
@pszymich pszymich
igc-1.0.5435
93f02a7
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igc-1.0.5435

Fixed Issues / Improvements

  • Added support for non-constant parameter for llvm.genx.GenISA.memoryfence and llvm.genx.GenISA.typedmemoryfence instructions,
  • Added analysis of stateless memory load/store,
  • Added env. variable for SPIRVDLL path,
  • Added new regkey to disable DispatchAlongY for HW IDs,
  • Avoiding passing large composite values when localizing globals by value,
  • Compile time improvements in IGC debug info,
  • Considering constant EM lowered in SIMDCFConformance,
  • Convert pseudo-or/and/xor to Gen or/and/xor if flag size is smaller than inst SIMD size,
  • Enabled vector-backend to take LLVM bitcode input,
  • Debug info should be generated automatically when run under gdb,
  • Enabled RNE by default for IEEE float-divide,
  • Enabled SIMD32 subgroup shuffles,
  • Fixed GRF register checking in linear scan RA,
  • Fixed parsing of switchjmp for vISA assembly,
  • Fixed SPIRV reader constructing reference type debug metadata,
  • Initial support for interprocedural TPM pass,
  • Introduction of new entry in IGC constant folder for IBFE,
  • Lower genx.*mul.sat intrinsics since integer mul.sat is not supported,
  • Made improvements in ranges emitted to .debug ranges section,
  • Negative modifiers are no longer baled if applied on unsigned integer,
  • Open sourced IMF LA; added common header,
  • Refactored Int64b support,
  • Removed indirection for input arguments,
  • Removed legacy inter-procedural analysis code for RA,
  • Removed support for -cl-feature,
  • Rewritten CM adaptor library,
  • Simplifying building workspace/instruction,
  • Skip CS simd32 if it is a retry to speed up compile time,
  • Skip invalid warning in ShaderOverride mode,
  • Unify the stack call functions for both global RA and linear scan RA,
  • Vector compiler:
    • Backend should not use reserved BTI indexes for debuggable kernels,
    • i64 emulation should convert partial predicates to icmp,
    • Refactored TransformNode CMABI.
  • Changes in preparation of LLVM 11 upgrade,
  • Other minor improvements and fixes.

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.5353

26 Oct 10:44
@pszymich pszymich
igc-1.0.5353
411ba3a
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Fixed Issues / Improvements

  • Implemented VISA stack call ABI in generated code; updated VISA debug info as per ABI,
  • Emitting caller save ranges to debug info for stack call functions,
  • Writing NewStore to MemRefs for correct isSafeToMergeLoad working,
  • Removed support for -cl-feature for Linux.

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.5349

26 Oct 10:59
@pszymich pszymich
igc-1.0.5349
79e29f5
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igc-1.0.5349

Fixed Issues / Improvements

  • Updated IGA,
  • Improving i64 emulation:
    • Enabled i64 emulation on platforms which do not support it,
    • Extended i64 emulation pass to support genx_min/max and genx_trunc_sat,
    • Avoiding i64 emulation for indirect operands,
  • Added CodeGenContext members for non-kernel-arg stateless memory access analysis,
  • Added DeleteLegacyIntrinsicDeclarations pass,
  • Added diagnostic for missing int<->double conversions,
  • Added System Routine interface,
  • Added a regkey to insert the discard code during IGC compilation,
  • Added support for double type in erf, erfc, lgamma and tgamma functions,
  • Added support for using vertex buffers to send shader draw parameters,
  • Added an ExtraOCLOptions regkey to configuration flags,
  • Added more debug output for VISA builder and regalloc,
  • Added new string macros; applied them to IGC,
  • Allowing arithmetic on generic pointers,
  • Changed vISA null variable to null ARF,
  • Cleaned up ld/st/atomic structured emit,
  • Improved marking allocas as random (non-uniform),
  • Fixed aligning method in live ranges,
  • Fixed condition to clean implicit id code when -cl-kernel-debug-enable is passed,
  • Fixed bug for linear Scan RA stack call,
  • Fixed enabling SIMD16 for stackcalls, accounting for enabling subroutines at the same time,
  • Optimized compilation time for linear scan RA,
  • Refactored StatelessToStatefull pass,
  • Refactored createInst() to avoid passing useless line number information,
  • Removed VC-related code from dllInterfaceCompute; moved this code to igcdeps library,
  • Removed LLVM 4 support in WrapperLLVM,
  • TrivialLocalMem optimization is meant for entry function only. Disabled it for subroutines,
  • Tuned remat cost functions,
  • Setting proper addrspace when localizing globals,
  • Multiple other improvements and bug fixes.

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.5186

12 Oct 17:18
@lwesiers lwesiers
igc-1.0.5186
aaed336
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igc-1.0.5186

Fixed Issues / Improvements

  • Fix for reading correctly registry key.
  • Cmp instruction is now correctly split in vISA.
  • Improved lowering shufflevector.
  • Support for -ze L0 options: -ze-opt-disable, -ze-opt-greater-than-4GB-buffer-required, -ze-opt-has-buffer-offset-arg

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.5176

05 Oct 15:09
@mbelicki mbelicki
igc-1.0.5176
3e7c8e9
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igc-1.0.5176

Fixed Issues / Improvements

  • Enabling inlining for -O0 to preserve debug info.
  • Replace libclc cospi and sinpi implementations with svml versions.
  • -cmc options to work the same way as -vc-codegen
  • Add a separate constant buffer for string literals in ZeBin path.
  • Several improvements to computation of ranges in debug_loc section.
  • Fix for comparison of ConstantDataSequentials when comparing constants
  • Enhance function pointers support in VC.
  • Fixed sporadic failures due to uninitialized variable.
  • Open-source svml cos/sin/sincos functions, which will be used when input's absolute value is less than 10000. Otherwise libclc implementation will be used.
  • Fix capability string in SPIRV reader to be conformant with spec.
  • Fix dominance corruption in SIMD CF Conformance
  • Fix fmax builtin conversion
  • Fix for select condition checker in SIMD CF Conformance
  • Add support for GenISA_simdBlockRead and GenISA_simdMediaBlockWrite GenISA intrinsics in Emu64OpsPass. This fixes the crash in IGC when compiling kernels with intel_sub_group_block_image_long for ICL platform.
  • Fix building for LLVM11
  • Add helper function to get image type from KernelArg (NFC)
  • Check for illegal VxH operands (<1,0> with exec size 32) in vISA verifier.
  • Fix wrong expected usage in genx wrapper
  • Remove split of cmp instructions in CISACodeGen as it is now handled by vISA.
  • CMABI is added to the list of VC passes in the plugin
  • Changes in preparation of LLVM 11 upgrade.
  • Fix for missing metadata for cloned functions
  • Fix building for LLVM11 (next part)
  • Update configuration_flags.md
  • Fix a bug where uniform vector broadcast was handled incorrectly on platforms without i64 support.
  • Default stack call and indirect call to compile SIMD16
  • Prepare constant loader to use data layout
  • Adding platform info to FCL interface
  • Add support of llvm text files for GenXWrapper
  • Align privatebase to 10 bits and explicitly tell InstCombiner the alignment of perThreadOffset and bufferOffset to avoid limitation of MaxDepth==6
  • simd-1 kernels shall allocate SIP surface if debug info is present
  • avoid emitting several visa indices for llvm instruction
  • Removed clang block type arguments from precompiled builtins in BiFModule.
  • Fix the Klock reported issue in linear scan RA
  • .elf with debug info can be dumped with ShaderDumpEnable
  • Fix translation of SPIRV DebugValue operation when first argument is OpConstant.
  • Add support for more opcodes in SPIRV to create DIExpression.
  • optimize the compilation time of linear Scan RA
  • Improved loadPhiConstants to handle bitcast chains
  • Remove split of arithmetic instructions in CISACodeGen as it is now handled by vISA.
  • Add current BB to HW conformity and make more use of replaceDst()
  • Add dump function to CVariable to assist debugging (NFC).
  • Swap src0 and src1 for pseudo-mad if src1 is scalar but src0 is not.
  • Avoid FP64 emulation related code if kernel doesn't use FP64 at all, second try.
  • Turn on writing caller's frame-pointer to callee's stack. Enable flag EnableWriteOldFPToStack to support stack-walk.
  • Remove split of logic instructions in CISACodeGen as it is now handled by vISA.
  • Add possibility to use ninja cmake-generator
  • Improved baling of new load insts
  • GetGenxDebugInfo should be a constant method
  • Add support of specializaton constants to VC
  • Pattern match for canonical predicate of an icmp instruction with negation.

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.5064

21 Sep 09:27
@pszymich pszymich
igc-1.0.5064
5abb954
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Fixed Issues / Improvements

  • Multiple refactor changes in preparation of LLVM upgrade to version 11.
  • Added shader dumping capabilities to VectorCompiler.
  • VectorCompiler now uses DebufInfo library.
  • Refactored debug information.
  • Fixes for compilation for OpenCL 3.0.
  • Remove alwaysinline attributes for call instructions if -cl-opt-disable is present.
  • Avoid FP64 emulation related code if kernel doesn't use FP64 at all.
  • Instruction splitting is now handled by vISA.
  • Enable splitting of instructions with indirect addressing.
  • Update GED version to 0.68.
  • Improvements to the legalizaton of shuffle-vector.
  • Removed LShr and AShr operands truncation.
  • Restricting spill space compression intra-iteration only in interest of compile time and memory usage.
  • Removed the EnableOCLNoInlineAttr flag, NoInline should be honored by default.
  • Multiple other improvements and minor changes throughout the project.

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.4944

15 Sep 13:41
@pszymich pszymich
igc-1.0.4944
466c703
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Fixed Issues / Improvements

  • Multiple refactor changes in preparation of LLVM upgrade to version 11.
  • Vector backend improvements:
    • clearer reports about unsupported types,
    • introduced i64 emulation pass,
    • support for -ftime-report,
    • support for genx_addc and genx_subb intrinsics.
  • Added support for OpConstFunctionPointerINTEL, 1024-bit constants in SPIRVReader.
  • Added patches for SPIRV-LLVM-Translator based on LLVM9.
  • Added support for experimental SYCL unmasked call feature.
  • Added option to force thread group size.
  • Added fallback path when ZEBinary is enabled by -allow-zebin.
  • Updated CMFE interface.
  • Relaxed some checks to allow a subset of i64 operations for targets without native i64 support.
  • Fixed translation of non 32/64-bit constants.
  • Fixed processing of GEP instruction when the index is a vector.
  • Fixed buildbreak with VectorCompiler switched off.
  • Removed unused IGA files, updated IGA.
  • Many minor optimization and code improvements throughout whole project.

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.4879

10 Sep 18:16
@lwesiers lwesiers
igc-1.0.4879
83fb083
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igc-1.0.4879

Fixed Issues / Improvements

  • SWSB sync instruction optimization
  • Increase large basic block size to calculate register pressure.
  • Support for emitting GenISA_simdShuffleDown in missing execution size (SIMD32)
  • Decode DIExpression operation in SPIRV reader.
  • Support emulation of general call and return for i64 type.
  • Enable accumulator use for ror/rol.
  • Minor fixes and improvements.

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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igc-1.0.4756

25 Aug 18:33
@mbelicki mbelicki
igc-1.0.4756
3623209
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Fixed Issues / Improvements

  • Update EOTRenderTarget() to use RTW instruction instead of a raw send.
  • Add WA to set noMask for all sampler.
  • Type of for statement iterator changed from unsigned int to uint64_t to prevent hangs.
  • Initial support for source/line debug information in VectorCompiler backend.
  • Fix a bug for A64 block store with byte source operand.
  • Fix number of elements to use in G4_Declare creation in remat.
  • Make IGC emit DW_AT_abstract_origin for inlined DW_TAG_lexical_block constructs.
  • Add a check to avoid invalid dereference.
  • Incorrect code generation for xor fix.
  • Adding a regkey to override product for debugging.
  • Create dummy kernel to attach symbol table and indirectly-called functions.
  • Move bfrev pattern from GenSpecificPattern to CustomSafeOptPass.
  • Adding attribute for selective stack calls.
  • Disable rematerialzation of intrinsic.split instruction.
  • Assign DebugLoc to pre-defined variables. Skip sinking of allocas when -cl-opt-disable is applied to keep .debug_ranges clean for inlined functions.
  • Fixes for OCL 3.0 feature macro usage.
  • Fix CISA offsets before splice operation in spill insertion.
  • Update EOTRenderTarget() to use RTW instruction instead of a raw send.
  • Fix regression in promotion of dynamic buffers to registers.
  • Allow enabling some features in Release mode using environment variables.
  • ZEBianry: support .spv and .gtpin_info section.
  • Add pass to classify move types.
  • Do not copy R0 when creating the header for bindless sampler message.
  • Eliminate select+phi redundancy in SIMD CF
  • Enable explicit variable split.
  • Fix some bugs in ZEBinary - Fixed ELF flag - Rename .data.global_const to .data.const - Remove local_id info if not used
  • Remove unncessary add for the common special case of add.pair with zero high32-bit values.
  • Add backend configuration pass for VC.
  • Merge instructions for 64bit emulation.
  • Add pass to Split Indirect EE to sel to avoid VxH mov.
  • Add dependency for EstimateFunctionSize.
  • Emit single copy of pre-defined variables when -cl-kernel-debug-enable is passed.
  • Inlining algorithm for controling Kernel Total Size.
  • Forward pointer support in SPIRV Reader.
  • Run earlyCSE after GEPLowering to optout some instrcutions introduced by GEPLowering.
  • Switching from -runtime to -binary-format option -binary-format=ze for ZEBinary output.
  • Stitch indirectly-called functions to the binary on VC side.
  • Starting from tgllp mid-thread preemption is no longer supported. EnablePreemption value should be set to false for these new platforms.

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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