@@ -104,8 +104,8 @@ Z80LegalizerInfo::Z80LegalizerInfo(const Z80Subtarget &STI,
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.clampScalar (1 , s8, sMax );
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getActionDefinitionsBuilder ({G_ADD, G_SUB})
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- .legalFor (LegalScalars )
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- .customFor ({s32, s64} )
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+ .legalFor ({s8} )
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+ .customFor (LegalLibcallScalars )
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.clampScalar (0 , s8, sMax );
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getActionDefinitionsBuilder ({G_UADDO, G_UADDE, G_USUBO, G_USUBE,
@@ -288,14 +288,18 @@ Z80LegalizerInfo::legalizeAddSub(LegalizerHelper &Helper, MachineInstr &MI,
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LostDebugLocObserver &LocObserver) const {
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assert ((MI.getOpcode () == G_ADD || MI.getOpcode () == G_SUB) &&
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" Unexpected opcode" );
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+ Function &F = Helper.MIRBuilder .getMF ().getFunction ();
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MachineRegisterInfo &MRI = *Helper.MIRBuilder .getMRI ();
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Register DstReg = MI.getOperand (0 ).getReg ();
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LLT LLTy = MRI.getType (DstReg);
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+ unsigned Size = LLTy.getSizeInBits ();
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+ bool LegalSize = Size == 16 || (Subtarget.is24Bit () && Size == 24 );
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Register LHSReg;
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if (mi_match (MI, MRI, m_Neg (m_Reg (LHSReg)))) {
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- auto &Ctx = Helper.MIRBuilder .getMF ().getFunction ().getContext ();
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+ if (!F.hasOptSize () && LegalSize)
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+ return LegalizerHelper::Legalized;
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+ auto &Ctx = F.getContext ();
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RTLIB::Libcall Libcall;
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- unsigned Size = LLTy.getSizeInBits ();
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switch (Size) {
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case 16 :
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Libcall = RTLIB::NEG_I16;
@@ -318,6 +322,8 @@ Z80LegalizerInfo::legalizeAddSub(LegalizerHelper &Helper, MachineInstr &MI,
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MI.eraseFromParent ();
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return LegalizerHelper::Legalized;
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}
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+ if (LegalSize)
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+ return LegalizerHelper::Legalized;
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return Helper.libcall (MI, LocObserver);
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}
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@@ -327,18 +333,26 @@ Z80LegalizerInfo::legalizeBitwise(LegalizerHelper &Helper, MachineInstr &MI,
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assert ((MI.getOpcode () == G_AND || MI.getOpcode () == G_OR ||
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MI.getOpcode () == G_XOR) &&
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" Unexpected opcode" );
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+ Function &F = Helper.MIRBuilder .getMF ().getFunction ();
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+ bool OptSize = F.hasOptSize ();
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MachineRegisterInfo &MRI = *Helper.MIRBuilder .getMRI ();
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Register DstReg = MI.getOperand (0 ).getReg ();
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LLT LLTy = MRI.getType (DstReg);
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- if (!MI.getParent ()->getParent ()->getFunction ().hasOptSize () &&
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- LLTy == LLT::scalar (16 ))
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+ if (!OptSize && LLTy == LLT::scalar (16 ))
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if (Helper.narrowScalar (MI, 0 , LLT::scalar (8 )) ==
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LegalizerHelper::Legalized)
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return LegalizerHelper::Legalized;
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Register LHSReg;
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if (mi_match (MI, MRI, m_Not (m_Reg (LHSReg)))) {
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- auto &Ctx = Helper.MIRBuilder .getMF ().getFunction ().getContext ();
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unsigned Size = LLTy.getSizeInBits ();
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+ if (!OptSize && (Size == 16 || (Subtarget.is24Bit () && Size == 24 ))) {
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+ Helper.MIRBuilder .buildSub (DstReg,
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+ Helper.MIRBuilder .buildConstant (LLTy, -1 ),
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+ MI.getOperand (1 ).getReg ());
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+ MI.eraseFromParent ();
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+ return LegalizerHelper::Legalized;
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+ }
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+ auto &Ctx = F.getContext ();
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RTLIB::Libcall Libcall;
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switch (Size) {
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case 16 :
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