Skip to content

Commit 2eb031e

Browse files
RalithRalith
committed
Remove cvt methods on Simd
To be replaced with dedicated traits for improved readability and abstraction.
1 parent 105d09b commit 2eb031e

File tree

11 files changed

+5
-340
lines changed

11 files changed

+5
-340
lines changed

‎fearless_simd/src/generated/fallback.rs‎

Lines changed: 0 additions & 80 deletions
Original file line numberDiff line numberDiff line change
@@ -304,26 +304,6 @@ impl Simd for Fallback {
304304
result.simd_into(self)
305305
}
306306
#[inline(always)]
307-
fn cvt_u32_f32x4(self, a: f32x4<Self>) -> u32x4<Self> {
308-
[
309-
a[0usize] as u32,
310-
a[1usize] as u32,
311-
a[2usize] as u32,
312-
a[3usize] as u32,
313-
]
314-
.simd_into(self)
315-
}
316-
#[inline(always)]
317-
fn cvt_i32_f32x4(self, a: f32x4<Self>) -> i32x4<Self> {
318-
[
319-
a[0usize] as i32,
320-
a[1usize] as i32,
321-
a[2usize] as i32,
322-
a[3usize] as i32,
323-
]
324-
.simd_into(self)
325-
}
326-
#[inline(always)]
327307
fn splat_i8x16(self, val: i8) -> i8x16<Self> {
328308
[val; 16usize].simd_into(self)
329309
}
@@ -2131,16 +2111,6 @@ impl Simd for Fallback {
21312111
}
21322112
}
21332113
#[inline(always)]
2134-
fn cvt_f32_i32x4(self, a: i32x4<Self>) -> f32x4<Self> {
2135-
[
2136-
a[0usize] as f32,
2137-
a[1usize] as f32,
2138-
a[2usize] as f32,
2139-
a[3usize] as f32,
2140-
]
2141-
.simd_into(self)
2142-
}
2143-
#[inline(always)]
21442114
fn splat_u32x4(self, val: u32) -> u32x4<Self> {
21452115
[val; 4usize].simd_into(self)
21462116
}
@@ -2327,16 +2297,6 @@ impl Simd for Fallback {
23272297
}
23282298
}
23292299
#[inline(always)]
2330-
fn cvt_f32_u32x4(self, a: u32x4<Self>) -> f32x4<Self> {
2331-
[
2332-
a[0usize] as f32,
2333-
a[1usize] as f32,
2334-
a[2usize] as f32,
2335-
a[3usize] as f32,
2336-
]
2337-
.simd_into(self)
2338-
}
2339-
#[inline(always)]
23402300
fn splat_mask32x4(self, val: i32) -> mask32x4<Self> {
23412301
[val; 4usize].simd_into(self)
23422302
}
@@ -2586,16 +2546,6 @@ impl Simd for Fallback {
25862546
(b0.simd_into(self), b1.simd_into(self))
25872547
}
25882548
#[inline(always)]
2589-
fn cvt_u32_f32x8(self, a: f32x8<Self>) -> u32x8<Self> {
2590-
let (a0, a1) = self.split_f32x8(a);
2591-
self.combine_u32x4(self.cvt_u32_f32x4(a0), self.cvt_u32_f32x4(a1))
2592-
}
2593-
#[inline(always)]
2594-
fn cvt_i32_f32x8(self, a: f32x8<Self>) -> i32x8<Self> {
2595-
let (a0, a1) = self.split_f32x8(a);
2596-
self.combine_i32x4(self.cvt_i32_f32x4(a0), self.cvt_i32_f32x4(a1))
2597-
}
2598-
#[inline(always)]
25992549
fn splat_i8x32(self, a: i8) -> i8x32<Self> {
26002550
let half = self.splat_i8x16(a);
26012551
self.combine_i8x16(half, half)
@@ -3406,11 +3356,6 @@ impl Simd for Fallback {
34063356
self.combine_u8x16(self.reinterpret_u8_i32x4(a0), self.reinterpret_u8_i32x4(a1))
34073357
}
34083358
#[inline(always)]
3409-
fn cvt_f32_i32x8(self, a: i32x8<Self>) -> f32x8<Self> {
3410-
let (a0, a1) = self.split_i32x8(a);
3411-
self.combine_f32x4(self.cvt_f32_i32x4(a0), self.cvt_f32_i32x4(a1))
3412-
}
3413-
#[inline(always)]
34143359
fn splat_u32x8(self, a: u32) -> u32x8<Self> {
34153360
let half = self.splat_u32x4(a);
34163361
self.combine_u32x4(half, half)
@@ -3543,11 +3488,6 @@ impl Simd for Fallback {
35433488
self.combine_u8x16(self.reinterpret_u8_u32x4(a0), self.reinterpret_u8_u32x4(a1))
35443489
}
35453490
#[inline(always)]
3546-
fn cvt_f32_u32x8(self, a: u32x8<Self>) -> f32x8<Self> {
3547-
let (a0, a1) = self.split_u32x8(a);
3548-
self.combine_f32x4(self.cvt_f32_u32x4(a0), self.cvt_f32_u32x4(a1))
3549-
}
3550-
#[inline(always)]
35513491
fn splat_mask32x8(self, a: i32) -> mask32x8<Self> {
35523492
let half = self.splat_mask32x4(a);
35533493
self.combine_mask32x4(half, half)
@@ -3808,16 +3748,6 @@ impl Simd for Fallback {
38083748
];
38093749
}
38103750
#[inline(always)]
3811-
fn cvt_u32_f32x16(self, a: f32x16<Self>) -> u32x16<Self> {
3812-
let (a0, a1) = self.split_f32x16(a);
3813-
self.combine_u32x8(self.cvt_u32_f32x8(a0), self.cvt_u32_f32x8(a1))
3814-
}
3815-
#[inline(always)]
3816-
fn cvt_i32_f32x16(self, a: f32x16<Self>) -> i32x16<Self> {
3817-
let (a0, a1) = self.split_f32x16(a);
3818-
self.combine_i32x8(self.cvt_i32_f32x8(a0), self.cvt_i32_f32x8(a1))
3819-
}
3820-
#[inline(always)]
38213751
fn splat_i8x64(self, a: i8) -> i8x64<Self> {
38223752
let half = self.splat_i8x32(a);
38233753
self.combine_i8x32(half, half)
@@ -4705,11 +4635,6 @@ impl Simd for Fallback {
47054635
self.combine_u8x32(self.reinterpret_u8_i32x8(a0), self.reinterpret_u8_i32x8(a1))
47064636
}
47074637
#[inline(always)]
4708-
fn cvt_f32_i32x16(self, a: i32x16<Self>) -> f32x16<Self> {
4709-
let (a0, a1) = self.split_i32x16(a);
4710-
self.combine_f32x8(self.cvt_f32_i32x8(a0), self.cvt_f32_i32x8(a1))
4711-
}
4712-
#[inline(always)]
47134638
fn splat_u32x16(self, a: u32) -> u32x16<Self> {
47144639
let half = self.splat_u32x8(a);
47154640
self.combine_u32x8(half, half)
@@ -4865,11 +4790,6 @@ impl Simd for Fallback {
48654790
self.combine_u8x32(self.reinterpret_u8_u32x8(a0), self.reinterpret_u8_u32x8(a1))
48664791
}
48674792
#[inline(always)]
4868-
fn cvt_f32_u32x16(self, a: u32x16<Self>) -> f32x16<Self> {
4869-
let (a0, a1) = self.split_u32x16(a);
4870-
self.combine_f32x8(self.cvt_f32_u32x8(a0), self.cvt_f32_u32x8(a1))
4871-
}
4872-
#[inline(always)]
48734793
fn splat_mask32x16(self, a: i32) -> mask32x16<Self> {
48744794
let half = self.splat_mask32x8(a);
48754795
self.combine_mask32x8(half, half)

‎fearless_simd/src/generated/neon.rs‎

Lines changed: 0 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -168,14 +168,6 @@ impl Simd for Neon {
168168
result.simd_into(self)
169169
}
170170
#[inline(always)]
171-
fn cvt_u32_f32x4(self, a: f32x4<Self>) -> u32x4<Self> {
172-
unsafe { vcvtq_u32_f32(a.into()).simd_into(self) }
173-
}
174-
#[inline(always)]
175-
fn cvt_i32_f32x4(self, a: f32x4<Self>) -> i32x4<Self> {
176-
unsafe { vcvtq_s32_f32(a.into()).simd_into(self) }
177-
}
178-
#[inline(always)]
179171
fn splat_i8x16(self, val: i8) -> i8x16<Self> {
180172
unsafe { vdupq_n_s8(val).simd_into(self) }
181173
}
@@ -715,10 +707,6 @@ impl Simd for Neon {
715707
unsafe { vreinterpretq_u8_s32(a.into()).simd_into(self) }
716708
}
717709
#[inline(always)]
718-
fn cvt_f32_i32x4(self, a: i32x4<Self>) -> f32x4<Self> {
719-
unsafe { vcvtq_f32_s32(a.into()).simd_into(self) }
720-
}
721-
#[inline(always)]
722710
fn splat_u32x4(self, val: u32) -> u32x4<Self> {
723711
unsafe { vdupq_n_u32(val).simd_into(self) }
724712
}
@@ -810,10 +798,6 @@ impl Simd for Neon {
810798
unsafe { vreinterpretq_u8_u32(a.into()).simd_into(self) }
811799
}
812800
#[inline(always)]
813-
fn cvt_f32_u32x4(self, a: u32x4<Self>) -> f32x4<Self> {
814-
unsafe { vcvtq_f32_u32(a.into()).simd_into(self) }
815-
}
816-
#[inline(always)]
817801
fn splat_mask32x4(self, val: i32) -> mask32x4<Self> {
818802
unsafe { vdupq_n_s32(val).simd_into(self) }
819803
}
@@ -1027,16 +1011,6 @@ impl Simd for Neon {
10271011
(b0.simd_into(self), b1.simd_into(self))
10281012
}
10291013
#[inline(always)]
1030-
fn cvt_u32_f32x8(self, a: f32x8<Self>) -> u32x8<Self> {
1031-
let (a0, a1) = self.split_f32x8(a);
1032-
self.combine_u32x4(self.cvt_u32_f32x4(a0), self.cvt_u32_f32x4(a1))
1033-
}
1034-
#[inline(always)]
1035-
fn cvt_i32_f32x8(self, a: f32x8<Self>) -> i32x8<Self> {
1036-
let (a0, a1) = self.split_f32x8(a);
1037-
self.combine_i32x4(self.cvt_i32_f32x4(a0), self.cvt_i32_f32x4(a1))
1038-
}
1039-
#[inline(always)]
10401014
fn splat_i8x32(self, a: i8) -> i8x32<Self> {
10411015
let half = self.splat_i8x16(a);
10421016
self.combine_i8x16(half, half)
@@ -1834,11 +1808,6 @@ impl Simd for Neon {
18341808
self.combine_u8x16(self.reinterpret_u8_i32x4(a0), self.reinterpret_u8_i32x4(a1))
18351809
}
18361810
#[inline(always)]
1837-
fn cvt_f32_i32x8(self, a: i32x8<Self>) -> f32x8<Self> {
1838-
let (a0, a1) = self.split_i32x8(a);
1839-
self.combine_f32x4(self.cvt_f32_i32x4(a0), self.cvt_f32_i32x4(a1))
1840-
}
1841-
#[inline(always)]
18421811
fn splat_u32x8(self, a: u32) -> u32x8<Self> {
18431812
let half = self.splat_u32x4(a);
18441813
self.combine_u32x4(half, half)
@@ -1971,11 +1940,6 @@ impl Simd for Neon {
19711940
self.combine_u8x16(self.reinterpret_u8_u32x4(a0), self.reinterpret_u8_u32x4(a1))
19721941
}
19731942
#[inline(always)]
1974-
fn cvt_f32_u32x8(self, a: u32x8<Self>) -> f32x8<Self> {
1975-
let (a0, a1) = self.split_u32x8(a);
1976-
self.combine_f32x4(self.cvt_f32_u32x4(a0), self.cvt_f32_u32x4(a1))
1977-
}
1978-
#[inline(always)]
19791943
fn splat_mask32x8(self, a: i32) -> mask32x8<Self> {
19801944
let half = self.splat_mask32x4(a);
19811945
self.combine_mask32x4(half, half)
@@ -2214,16 +2178,6 @@ impl Simd for Neon {
22142178
unsafe { vst4q_f32(dest.as_mut_ptr(), a.into()) }
22152179
}
22162180
#[inline(always)]
2217-
fn cvt_u32_f32x16(self, a: f32x16<Self>) -> u32x16<Self> {
2218-
let (a0, a1) = self.split_f32x16(a);
2219-
self.combine_u32x8(self.cvt_u32_f32x8(a0), self.cvt_u32_f32x8(a1))
2220-
}
2221-
#[inline(always)]
2222-
fn cvt_i32_f32x16(self, a: f32x16<Self>) -> i32x16<Self> {
2223-
let (a0, a1) = self.split_f32x16(a);
2224-
self.combine_i32x8(self.cvt_i32_f32x8(a0), self.cvt_i32_f32x8(a1))
2225-
}
2226-
#[inline(always)]
22272181
fn splat_i8x64(self, a: i8) -> i8x64<Self> {
22282182
let half = self.splat_i8x32(a);
22292183
self.combine_i8x32(half, half)
@@ -2994,11 +2948,6 @@ impl Simd for Neon {
29942948
self.combine_u8x32(self.reinterpret_u8_i32x8(a0), self.reinterpret_u8_i32x8(a1))
29952949
}
29962950
#[inline(always)]
2997-
fn cvt_f32_i32x16(self, a: i32x16<Self>) -> f32x16<Self> {
2998-
let (a0, a1) = self.split_i32x16(a);
2999-
self.combine_f32x8(self.cvt_f32_i32x8(a0), self.cvt_f32_i32x8(a1))
3000-
}
3001-
#[inline(always)]
30022951
fn splat_u32x16(self, a: u32) -> u32x16<Self> {
30032952
let half = self.splat_u32x8(a);
30042953
self.combine_u32x8(half, half)
@@ -3132,11 +3081,6 @@ impl Simd for Neon {
31323081
self.combine_u8x32(self.reinterpret_u8_u32x8(a0), self.reinterpret_u8_u32x8(a1))
31333082
}
31343083
#[inline(always)]
3135-
fn cvt_f32_u32x16(self, a: u32x16<Self>) -> f32x16<Self> {
3136-
let (a0, a1) = self.split_u32x16(a);
3137-
self.combine_f32x8(self.cvt_f32_u32x8(a0), self.cvt_f32_u32x8(a1))
3138-
}
3139-
#[inline(always)]
31403084
fn splat_mask32x16(self, a: i32) -> mask32x16<Self> {
31413085
let half = self.splat_mask32x8(a);
31423086
self.combine_mask32x8(half, half)

‎fearless_simd/src/generated/simd_trait.rs‎

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -50,8 +50,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
5050
fn trunc_f32x4(self, a: f32x4<Self>) -> f32x4<Self>;
5151
fn select_f32x4(self, a: mask32x4<Self>, b: f32x4<Self>, c: f32x4<Self>) -> f32x4<Self>;
5252
fn combine_f32x4(self, a: f32x4<Self>, b: f32x4<Self>) -> f32x8<Self>;
53-
fn cvt_u32_f32x4(self, a: f32x4<Self>) -> u32x4<Self>;
54-
fn cvt_i32_f32x4(self, a: f32x4<Self>) -> i32x4<Self>;
5553
fn splat_i8x16(self, val: i8) -> i8x16<Self>;
5654
fn not_i8x16(self, a: i8x16<Self>) -> i8x16<Self>;
5755
fn add_i8x16(self, a: i8x16<Self>, b: i8x16<Self>) -> i8x16<Self>;
@@ -183,7 +181,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
183181
fn max_i32x4(self, a: i32x4<Self>, b: i32x4<Self>) -> i32x4<Self>;
184182
fn combine_i32x4(self, a: i32x4<Self>, b: i32x4<Self>) -> i32x8<Self>;
185183
fn reinterpret_u8_i32x4(self, a: i32x4<Self>) -> u8x16<Self>;
186-
fn cvt_f32_i32x4(self, a: i32x4<Self>) -> f32x4<Self>;
187184
fn splat_u32x4(self, val: u32) -> u32x4<Self>;
188185
fn not_u32x4(self, a: u32x4<Self>) -> u32x4<Self>;
189186
fn add_u32x4(self, a: u32x4<Self>, b: u32x4<Self>) -> u32x4<Self>;
@@ -205,7 +202,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
205202
fn max_u32x4(self, a: u32x4<Self>, b: u32x4<Self>) -> u32x4<Self>;
206203
fn combine_u32x4(self, a: u32x4<Self>, b: u32x4<Self>) -> u32x8<Self>;
207204
fn reinterpret_u8_u32x4(self, a: u32x4<Self>) -> u8x16<Self>;
208-
fn cvt_f32_u32x4(self, a: u32x4<Self>) -> f32x4<Self>;
209205
fn splat_mask32x4(self, val: i32) -> mask32x4<Self>;
210206
fn not_mask32x4(self, a: mask32x4<Self>) -> mask32x4<Self>;
211207
fn and_mask32x4(self, a: mask32x4<Self>, b: mask32x4<Self>) -> mask32x4<Self>;
@@ -247,8 +243,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
247243
fn select_f32x8(self, a: mask32x8<Self>, b: f32x8<Self>, c: f32x8<Self>) -> f32x8<Self>;
248244
fn combine_f32x8(self, a: f32x8<Self>, b: f32x8<Self>) -> f32x16<Self>;
249245
fn split_f32x8(self, a: f32x8<Self>) -> (f32x4<Self>, f32x4<Self>);
250-
fn cvt_u32_f32x8(self, a: f32x8<Self>) -> u32x8<Self>;
251-
fn cvt_i32_f32x8(self, a: f32x8<Self>) -> i32x8<Self>;
252246
fn splat_i8x32(self, val: i8) -> i8x32<Self>;
253247
fn not_i8x32(self, a: i8x32<Self>) -> i8x32<Self>;
254248
fn add_i8x32(self, a: i8x32<Self>, b: i8x32<Self>) -> i8x32<Self>;
@@ -388,7 +382,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
388382
fn combine_i32x8(self, a: i32x8<Self>, b: i32x8<Self>) -> i32x16<Self>;
389383
fn split_i32x8(self, a: i32x8<Self>) -> (i32x4<Self>, i32x4<Self>);
390384
fn reinterpret_u8_i32x8(self, a: i32x8<Self>) -> u8x32<Self>;
391-
fn cvt_f32_i32x8(self, a: i32x8<Self>) -> f32x8<Self>;
392385
fn splat_u32x8(self, val: u32) -> u32x8<Self>;
393386
fn not_u32x8(self, a: u32x8<Self>) -> u32x8<Self>;
394387
fn add_u32x8(self, a: u32x8<Self>, b: u32x8<Self>) -> u32x8<Self>;
@@ -411,7 +404,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
411404
fn combine_u32x8(self, a: u32x8<Self>, b: u32x8<Self>) -> u32x16<Self>;
412405
fn split_u32x8(self, a: u32x8<Self>) -> (u32x4<Self>, u32x4<Self>);
413406
fn reinterpret_u8_u32x8(self, a: u32x8<Self>) -> u8x32<Self>;
414-
fn cvt_f32_u32x8(self, a: u32x8<Self>) -> f32x8<Self>;
415407
fn splat_mask32x8(self, val: i32) -> mask32x8<Self>;
416408
fn not_mask32x8(self, a: mask32x8<Self>) -> mask32x8<Self>;
417409
fn and_mask32x8(self, a: mask32x8<Self>, b: mask32x8<Self>) -> mask32x8<Self>;
@@ -455,8 +447,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
455447
fn split_f32x16(self, a: f32x16<Self>) -> (f32x8<Self>, f32x8<Self>);
456448
fn load_interleaved_128_f32x16(self, src: &[f32; 16usize]) -> f32x16<Self>;
457449
fn store_interleaved_128_f32x16(self, a: f32x16<Self>, dest: &mut [f32; 16usize]) -> ();
458-
fn cvt_u32_f32x16(self, a: f32x16<Self>) -> u32x16<Self>;
459-
fn cvt_i32_f32x16(self, a: f32x16<Self>) -> i32x16<Self>;
460450
fn splat_i8x64(self, val: i8) -> i8x64<Self>;
461451
fn not_i8x64(self, a: i8x64<Self>) -> i8x64<Self>;
462452
fn add_i8x64(self, a: i8x64<Self>, b: i8x64<Self>) -> i8x64<Self>;
@@ -592,7 +582,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
592582
fn max_i32x16(self, a: i32x16<Self>, b: i32x16<Self>) -> i32x16<Self>;
593583
fn split_i32x16(self, a: i32x16<Self>) -> (i32x8<Self>, i32x8<Self>);
594584
fn reinterpret_u8_i32x16(self, a: i32x16<Self>) -> u8x64<Self>;
595-
fn cvt_f32_i32x16(self, a: i32x16<Self>) -> f32x16<Self>;
596585
fn splat_u32x16(self, val: u32) -> u32x16<Self>;
597586
fn not_u32x16(self, a: u32x16<Self>) -> u32x16<Self>;
598587
fn add_u32x16(self, a: u32x16<Self>, b: u32x16<Self>) -> u32x16<Self>;
@@ -616,7 +605,6 @@ pub trait Simd: Sized + Clone + Copy + Send + Sync + Seal + 'static {
616605
fn load_interleaved_128_u32x16(self, src: &[u32; 16usize]) -> u32x16<Self>;
617606
fn store_interleaved_128_u32x16(self, a: u32x16<Self>, dest: &mut [u32; 16usize]) -> ();
618607
fn reinterpret_u8_u32x16(self, a: u32x16<Self>) -> u8x64<Self>;
619-
fn cvt_f32_u32x16(self, a: u32x16<Self>) -> f32x16<Self>;
620608
fn splat_mask32x16(self, val: i32) -> mask32x16<Self>;
621609
fn not_mask32x16(self, a: mask32x16<Self>) -> mask32x16<Self>;
622610
fn and_mask32x16(self, a: mask32x16<Self>, b: mask32x16<Self>) -> mask32x16<Self>;

0 commit comments

Comments
 (0)