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[FIRRTL] LowerSigs: Add enum support #8731

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Jul 18, 2025
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1 change: 0 additions & 1 deletion lib/Dialect/FIRRTL/Transforms/LowerSignatures.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -227,7 +227,6 @@ computeLoweringImpl(FModuleLike mod, PortConversion &newPorts, Convention conv,
}
return success();
})
.Case<FEnumType>([&](FEnumType fenum) { return failure(); })
.Default([&](FIRRTLType type) {
// Properties and other types wind up here.
newPorts.push_back(
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9 changes: 9 additions & 0 deletions test/Dialect/FIRRTL/lower-types.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -391,6 +391,15 @@ firrtl.circuit "TopLevel" {
firrtl.connect %out, %in: !firrtl.vector<bundle<a : uint<1>, b flip: uint<1>>, 2>, !firrtl.vector<bundle<a : uint<1>, b flip: uint<1>>, 2>
}

// Test enum lowering. Currently leaves enumerations untouched.
// CHECK-LABEL: @LowerEnums
// CHECK: %a: !firrtl.enum<a: uint<1>>
// CHECK: %b: !firrtl.enum<a: uint<1>>
firrtl.module private @LowerEnums(in %a: !firrtl.enum<a: uint<1>>, out %b: !firrtl.enum<a: uint<1>>) {
// CHECK: firrtl.matchingconnect %b, %a : !firrtl.enum<a: uint<1>>
firrtl.matchingconnect %b, %a : !firrtl.enum<a: uint<1>>
}

// COMMON-LABEL: firrtl.extmodule @ExternalModule(in source_valid: !firrtl.uint<1>, out source_ready: !firrtl.uint<1>, in source_data: !firrtl.uint<64>)
firrtl.extmodule @ExternalModule(in source: !firrtl.bundle<valid: uint<1>, ready flip: uint<1>, data: uint<64>>)
firrtl.module private @Test() {
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