Update llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Co-authored-by: Matt Arsenault <[email protected]>

Author: jrbyrnes

llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

@@ -1048,7 +1048,7 @@ bool GCNSchedStage::initGCNSchedStage() {
 
 bool AVGPRRewriteScheduleStage::reconstrainRegClass(
     Register Reg, const TargetRegisterClass *NewRC) const {
-  const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
+  const SIInstrInfo *TII = MF.getSubtarget<GCNSubtarget>().getInstrInfo();
   const TargetRegisterClass *OldRC = DAG.MRI.getRegClass(Reg);
   const TargetRegisterInfo *TRI = DAG.MRI.getTargetRegisterInfo();
   const TargetRegisterClass *ConstrainRC = NewRC;