Skip to content

Commit 3b646c6

Browse files
committed
[LoopVectorize] Peek through bitcasts when performing CSE
LoopVectorize performs CSE of induction variable instructions. Add bitcasts to the worklist as well.
1 parent 82c0a53 commit 3b646c6

File tree

2 files changed

+73
-1
lines changed

2 files changed

+73
-1
lines changed

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2643,7 +2643,8 @@ namespace {
26432643
struct CSEDenseMapInfo {
26442644
static bool canHandle(const Instruction *I) {
26452645
return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) ||
2646-
isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I);
2646+
isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I) ||
2647+
isa<BitCastInst>(I);
26472648
}
26482649

26492650
static inline Instruction *getEmptyKey() {
Lines changed: 71 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,71 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2+
; RUN: opt %s -passes=loop-vectorize -S | FileCheck %s
3+
4+
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
5+
target triple = "x86_64-unknown-linux-gnu"
6+
7+
define i32 @bitcast-cse(i16 %0) {
8+
; CHECK-LABEL: define i32 @bitcast-cse(
9+
; CHECK-SAME: i16 [[TMP0:%.*]]) {
10+
; CHECK-NEXT: [[ENTRY:.*]]:
11+
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
12+
; CHECK: [[VECTOR_PH]]:
13+
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i64 0
14+
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i16> [[BROADCAST_SPLATINSERT]], <4 x i16> poison, <4 x i32> zeroinitializer
15+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
16+
; CHECK: [[VECTOR_BODY]]:
17+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
18+
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4
19+
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 16
20+
; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr null, i64 [[OFFSET_IDX]]
21+
; CHECK-NEXT: [[NEXT_GEP1:%.*]] = getelementptr i8, ptr null, i64 [[TMP1]]
22+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[BROADCAST_SPLAT]] to <4 x half>
23+
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x half> [[TMP2]], <4 x half> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
24+
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x half> [[TMP3]], <8 x half> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
25+
; CHECK-NEXT: store <8 x half> [[INTERLEAVED_VEC]], ptr [[NEXT_GEP]], align 1
26+
; CHECK-NEXT: store <8 x half> [[INTERLEAVED_VEC]], ptr [[NEXT_GEP1]], align 1
27+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
28+
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], -9223372036854775808
29+
; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
30+
; CHECK: [[MIDDLE_BLOCK]]:
31+
; CHECK-NEXT: br i1 true, label %[[FOR_END_LOOPEXIT909:.*]], label %[[SCALAR_PH]]
32+
; CHECK: [[SCALAR_PH]]:
33+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ null, %[[MIDDLE_BLOCK]] ], [ null, %[[ENTRY]] ]
34+
; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i64 [ 0, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
35+
; CHECK-NEXT: br label %[[DO_BODY93_I705:.*]]
36+
; CHECK: [[DO_BODY93_I705]]:
37+
; CHECK-NEXT: [[DEST_10_I706:%.*]] = phi ptr [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[ADD_PTR97_I709:%.*]], %[[DO_BODY93_I705]] ]
38+
; CHECK-NEXT: [[LEN_ADDR_8_I707:%.*]] = phi i64 [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[SUB99_I710:%.*]], %[[DO_BODY93_I705]] ]
39+
; CHECK-NEXT: store i16 [[TMP0]], ptr [[DEST_10_I706]], align 1
40+
; CHECK-NEXT: [[ARRAYIDX96_I708:%.*]] = getelementptr i16, ptr [[DEST_10_I706]], i64 1
41+
; CHECK-NEXT: store half 0xH0000, ptr [[ARRAYIDX96_I708]], align 1
42+
; CHECK-NEXT: [[ADD_PTR97_I709]] = getelementptr i16, ptr [[DEST_10_I706]], i64 2
43+
; CHECK-NEXT: [[SUB99_I710]] = add i64 [[LEN_ADDR_8_I707]], -2
44+
; CHECK-NEXT: [[TOBOOL100_NOT_I711:%.*]] = icmp eq i64 [[SUB99_I710]], 0
45+
; CHECK-NEXT: br i1 [[TOBOOL100_NOT_I711]], label %[[FOR_END_LOOPEXIT909]], label %[[DO_BODY93_I705]], !llvm.loop [[LOOP3:![0-9]+]]
46+
; CHECK: [[FOR_END_LOOPEXIT909]]:
47+
; CHECK-NEXT: ret i32 0
48+
;
49+
entry:
50+
br label %do.body93.i705
51+
52+
do.body93.i705:
53+
%dest.10.i706 = phi ptr [ null, %entry ], [ %add.ptr97.i709, %do.body93.i705 ]
54+
%len.addr.8.i707 = phi i64 [ 0, %entry ], [ %sub99.i710, %do.body93.i705 ]
55+
store i16 %0, ptr %dest.10.i706, align 1
56+
%arrayidx96.i708 = getelementptr i16, ptr %dest.10.i706, i64 1
57+
store half 0.0, ptr %arrayidx96.i708, align 1
58+
%add.ptr97.i709 = getelementptr i16, ptr %dest.10.i706, i64 2
59+
%sub99.i710 = add i64 %len.addr.8.i707, -2
60+
%tobool100.not.i711 = icmp eq i64 %sub99.i710, 0
61+
br i1 %tobool100.not.i711, label %for.end.loopexit909, label %do.body93.i705
62+
63+
for.end.loopexit909:
64+
ret i32 0
65+
}
66+
;.
67+
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
68+
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
69+
; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
70+
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
71+
;.

0 commit comments

Comments
 (0)