comment

Author: Pierre-vh

llvm/test/CodeGen/AMDGPU/workitems-intrinsics-opts.ll renamed to llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -O3 -mtriple=amdgcn -mcpu=fiji %s -o - | FileCheck %s --check-prefixes=GFX8,DAGISEL-GFX9
+; RUN: llc -O3 -mtriple=amdgcn -mcpu=fiji %s -o - | FileCheck %s --check-prefixes=GFX8,DAGISEL-GFX8
 ; RUN: llc -O3 -mtriple=amdgcn -mcpu=gfx942 %s -o - | FileCheck %s --check-prefixes=GFX942,DAGISEL-GFX942
 ; RUN: llc -O3 -mtriple=amdgcn -mcpu=gfx1200 %s -o - | FileCheck %s --check-prefixes=GFX12,DAGISEL-GFX12
 
@@ -9,17 +9,17 @@
 
 ; (workitem_id_x | workitem_id_y | workitem_id_z) == 0
 define i1 @workitem_zero() {
-; DAGISEL-GFX9-LABEL: workitem_zero:
-; DAGISEL-GFX9:       ; %bb.0: ; %entry
-; DAGISEL-GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX9-NEXT:    v_lshrrev_b32_e32 v1, 10, v31
-; DAGISEL-GFX9-NEXT:    v_lshrrev_b32_e32 v0, 20, v31
-; DAGISEL-GFX9-NEXT:    v_or_b32_e32 v1, v31, v1
-; DAGISEL-GFX9-NEXT:    v_or_b32_e32 v0, v1, v0
-; DAGISEL-GFX9-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
-; DAGISEL-GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0
-; DAGISEL-GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
-; DAGISEL-GFX9-NEXT:    s_setpc_b64 s[30:31]
+; DAGISEL-GFX8-LABEL: workitem_zero:
+; DAGISEL-GFX8:       ; %bb.0: ; %entry
+; DAGISEL-GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX8-NEXT:    v_lshrrev_b32_e32 v1, 10, v31
+; DAGISEL-GFX8-NEXT:    v_lshrrev_b32_e32 v0, 20, v31
+; DAGISEL-GFX8-NEXT:    v_or_b32_e32 v1, v31, v1
+; DAGISEL-GFX8-NEXT:    v_or_b32_e32 v0, v1, v0
+; DAGISEL-GFX8-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
+; DAGISEL-GFX8-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0
+; DAGISEL-GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
+; DAGISEL-GFX8-NEXT:    s_setpc_b64 s[30:31]
 ;
 ; DAGISEL-GFX942-LABEL: workitem_zero:
 ; DAGISEL-GFX942:       ; %bb.0: ; %entry
@@ -103,17 +103,17 @@ entry:
 
 ; (workitem_id_x | workitem_id_y | workitem_id_z) != 0
 define i1 @workitem_nonzero() {
-; DAGISEL-GFX9-LABEL: workitem_nonzero:
-; DAGISEL-GFX9:       ; %bb.0: ; %entry
-; DAGISEL-GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX9-NEXT:    v_lshrrev_b32_e32 v1, 10, v31
-; DAGISEL-GFX9-NEXT:    v_lshrrev_b32_e32 v0, 20, v31
-; DAGISEL-GFX9-NEXT:    v_or_b32_e32 v1, v31, v1
-; DAGISEL-GFX9-NEXT:    v_or_b32_e32 v0, v1, v0
-; DAGISEL-GFX9-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
-; DAGISEL-GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
-; DAGISEL-GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
-; DAGISEL-GFX9-NEXT:    s_setpc_b64 s[30:31]
+; DAGISEL-GFX8-LABEL: workitem_nonzero:
+; DAGISEL-GFX8:       ; %bb.0: ; %entry
+; DAGISEL-GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX8-NEXT:    v_lshrrev_b32_e32 v1, 10, v31
+; DAGISEL-GFX8-NEXT:    v_lshrrev_b32_e32 v0, 20, v31
+; DAGISEL-GFX8-NEXT:    v_or_b32_e32 v1, v31, v1
+; DAGISEL-GFX8-NEXT:    v_or_b32_e32 v0, v1, v0
+; DAGISEL-GFX8-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
+; DAGISEL-GFX8-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
+; DAGISEL-GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
+; DAGISEL-GFX8-NEXT:    s_setpc_b64 s[30:31]
 ;
 ; DAGISEL-GFX942-LABEL: workitem_nonzero:
 ; DAGISEL-GFX942:       ; %bb.0: ; %entry
@@ -197,15 +197,15 @@ entry:
 
 ; (workgroup_id_x | workgroup_id_y | workgroup_id_z) == 0
 define i1 @workgroup_zero() {
-; DAGISEL-GFX9-LABEL: workgroup_zero:
-; DAGISEL-GFX9:       ; %bb.0: ; %entry
-; DAGISEL-GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX9-NEXT:    s_or_b32 s4, s12, s13
-; DAGISEL-GFX9-NEXT:    s_or_b32 s4, s4, s14
-; DAGISEL-GFX9-NEXT:    s_cmp_eq_u32 s4, 0
-; DAGISEL-GFX9-NEXT:    s_cselect_b64 s[4:5], -1, 0
-; DAGISEL-GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
-; DAGISEL-GFX9-NEXT:    s_setpc_b64 s[30:31]
+; DAGISEL-GFX8-LABEL: workgroup_zero:
+; DAGISEL-GFX8:       ; %bb.0: ; %entry
+; DAGISEL-GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX8-NEXT:    s_or_b32 s4, s12, s13
+; DAGISEL-GFX8-NEXT:    s_or_b32 s4, s4, s14
+; DAGISEL-GFX8-NEXT:    s_cmp_eq_u32 s4, 0
+; DAGISEL-GFX8-NEXT:    s_cselect_b64 s[4:5], -1, 0
+; DAGISEL-GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
+; DAGISEL-GFX8-NEXT:    s_setpc_b64 s[30:31]
 ;
 ; DAGISEL-GFX942-LABEL: workgroup_zero:
 ; DAGISEL-GFX942:       ; %bb.0: ; %entry
@@ -288,15 +288,15 @@ entry:
 
 ; (workgroup_id_x | workgroup_id_y | workgroup_id_z) != 0
 define i1 @workgroup_nonzero() {
-; DAGISEL-GFX9-LABEL: workgroup_nonzero:
-; DAGISEL-GFX9:       ; %bb.0: ; %entry
-; DAGISEL-GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX9-NEXT:    s_or_b32 s4, s12, s13
-; DAGISEL-GFX9-NEXT:    s_or_b32 s4, s4, s14
-; DAGISEL-GFX9-NEXT:    s_cmp_lg_u32 s4, 0
-; DAGISEL-GFX9-NEXT:    s_cselect_b64 s[4:5], -1, 0
-; DAGISEL-GFX9-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
-; DAGISEL-GFX9-NEXT:    s_setpc_b64 s[30:31]
+; DAGISEL-GFX8-LABEL: workgroup_nonzero:
+; DAGISEL-GFX8:       ; %bb.0: ; %entry
+; DAGISEL-GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX8-NEXT:    s_or_b32 s4, s12, s13
+; DAGISEL-GFX8-NEXT:    s_or_b32 s4, s4, s14
+; DAGISEL-GFX8-NEXT:    s_cmp_lg_u32 s4, 0
+; DAGISEL-GFX8-NEXT:    s_cselect_b64 s[4:5], -1, 0
+; DAGISEL-GFX8-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
+; DAGISEL-GFX8-NEXT:    s_setpc_b64 s[30:31]
 ;
 ; DAGISEL-GFX942-LABEL: workgroup_nonzero:
 ; DAGISEL-GFX942:       ; %bb.0: ; %entry