@@ -84,8 +84,11 @@ define void @vscale_mul_8(ptr noalias noundef readonly captures(none) %a, ptr n
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; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP22]], align 4
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; CHECK-NEXT: [[TMP17:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]
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; CHECK-NEXT: [[TMP14:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]
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+ ; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()
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+ ; CHECK-NEXT: [[TMP16:%.*]] = mul nuw i64 [[TMP15]], 4
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+ ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP16]]
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; CHECK-NEXT: store <vscale x 4 x float> [[TMP17]], ptr [[B]], align 4
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- ; CHECK-NEXT: store <vscale x 4 x float> [[TMP14]], ptr [[TMP22 ]], align 4
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+ ; CHECK-NEXT: store <vscale x 4 x float> [[TMP14]], ptr [[TMP18 ]], align 4
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[MUL1]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY:.*]]
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; CHECK: [[FOR_COND_CLEANUP]]:
@@ -222,16 +225,13 @@ define void @vscale_mul_31(ptr noalias noundef readonly captures(none) %a, ptr n
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; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP14:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP15:%.*]] = mul nuw i64 [[TMP14]], 4
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- ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw float, ptr [[TMP12]], i64 [[TMP15]]
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+ ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr float, ptr [[TMP12]], i64 [[TMP15]]
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; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP12]], align 4
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; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP16]], align 4
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; CHECK-NEXT: [[TMP17:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]
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; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]
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- ; CHECK-NEXT: [[TMP19:%.*]] = call i64 @llvm.vscale.i64()
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- ; CHECK-NEXT: [[TMP20:%.*]] = mul nuw i64 [[TMP19]], 4
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- ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw float, ptr [[TMP12]], i64 [[TMP20]]
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; CHECK-NEXT: store <vscale x 4 x float> [[TMP17]], ptr [[TMP12]], align 4
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- ; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP21 ]], align 4
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+ ; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP16 ]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]]
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; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
@@ -305,16 +305,13 @@ define void @vscale_mul_64(ptr noalias noundef readonly captures(none) %a, ptr n
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; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP14:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP15:%.*]] = mul nuw i64 [[TMP14]], 4
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- ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw float, ptr [[TMP12]], i64 [[TMP15]]
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+ ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr float, ptr [[TMP12]], i64 [[TMP15]]
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; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP12]], align 4
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; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP16]], align 4
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; CHECK-NEXT: [[TMP17:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]
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; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]
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- ; CHECK-NEXT: [[TMP19:%.*]] = call i64 @llvm.vscale.i64()
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- ; CHECK-NEXT: [[TMP20:%.*]] = mul nuw i64 [[TMP19]], 4
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- ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw float, ptr [[TMP12]], i64 [[TMP20]]
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; CHECK-NEXT: store <vscale x 4 x float> [[TMP17]], ptr [[TMP12]], align 4
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- ; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP21 ]], align 4
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+ ; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP16 ]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]]
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; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
@@ -390,16 +387,13 @@ define void @trip_count_with_overflow(ptr noalias noundef readonly captures(none
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; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP16:%.*]] = mul nuw i64 [[TMP15]], 4
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- ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[TMP16]]
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+ ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr float, ptr [[TMP13]], i64 [[TMP16]]
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; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP13]], align 4
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; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP17]], align 4
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; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]
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; CHECK-NEXT: [[TMP19:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]
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- ; CHECK-NEXT: [[TMP20:%.*]] = call i64 @llvm.vscale.i64()
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- ; CHECK-NEXT: [[TMP21:%.*]] = mul nuw i64 [[TMP20]], 4
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- ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[TMP21]]
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; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP13]], align 4
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- ; CHECK-NEXT: store <vscale x 4 x float> [[TMP19]], ptr [[TMP22 ]], align 4
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+ ; CHECK-NEXT: store <vscale x 4 x float> [[TMP19]], ptr [[TMP17 ]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP7]]
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; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
@@ -471,16 +465,13 @@ define void @trip_count_too_big_for_element_count(ptr noalias noundef readonly c
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; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP16:%.*]] = mul nuw i64 [[TMP15]], 4
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- ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[TMP16]]
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+ ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr float, ptr [[TMP13]], i64 [[TMP16]]
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; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 4 x float>, ptr [[TMP13]], align 4
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; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <vscale x 4 x float>, ptr [[TMP17]], align 4
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; CHECK-NEXT: [[TMP18:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD]], [[WIDE_LOAD2]]
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; CHECK-NEXT: [[TMP19:%.*]] = fmul <vscale x 4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD3]]
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- ; CHECK-NEXT: [[TMP20:%.*]] = call i64 @llvm.vscale.i64()
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- ; CHECK-NEXT: [[TMP21:%.*]] = mul nuw i64 [[TMP20]], 4
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- ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[TMP21]]
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; CHECK-NEXT: store <vscale x 4 x float> [[TMP18]], ptr [[TMP13]], align 4
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- ; CHECK-NEXT: store <vscale x 4 x float> [[TMP19]], ptr [[TMP22 ]], align 4
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+ ; CHECK-NEXT: store <vscale x 4 x float> [[TMP19]], ptr [[TMP17 ]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP7]]
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; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
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