[VPlan] CSE bugfix: consider Cmp Predicate

Author: artagnon

llvm/lib/Transforms/Vectorize/VPlan.h

@@ -792,8 +792,8 @@ class VPIRFlags {
   }
 
   CmpInst::Predicate getPredicate() const {
-    assert(OpType == OperationType::Cmp &&
-           "recipe doesn't have a compare predicate");
+    if (OpType != OperationType::Cmp)
+      return CmpInst::BAD_ICMP_PREDICATE;
     return CmpPredicate;
   }
 

llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

@@ -1809,9 +1809,11 @@ struct VPCSEDenseMapInfo : public DenseMapInfo<VPSingleDefRecipe *> {
         Def->getVPDefID(), getOpcodeOrIntrinsicID(Def),
         TypeInfo.inferScalarType(Def), vputils::isSingleScalar(Def),
         hash_combine_range(Def->operands()));
-    return isa<VPReplicateRecipe>(Def)
-               ? hash_combine(Result, Def->getUnderlyingInstr())
-               : Result;
+    if (isa<VPReplicateRecipe>(Def))
+      return hash_combine(Result, Def->getUnderlyingInstr());
+    if (auto *RFlags = dyn_cast<VPRecipeWithIRFlags>(Def))
+      return hash_combine(Result, RFlags->getPredicate());
+    return Result;
   }
 
   /// Check equality of underlying data of \p L and \p R.
@@ -1827,6 +1829,9 @@ struct VPCSEDenseMapInfo : public DenseMapInfo<VPSingleDefRecipe *> {
                   equal(L->operands(), R->operands());
     if (Result && isa<VPReplicateRecipe>(L))
       Result = L->getUnderlyingInstr() == R->getUnderlyingInstr();
+    if (Result && isa<VPRecipeWithIRFlags>(L))
+      Result = cast<VPRecipeWithIRFlags>(L)->getPredicate() ==
+               cast<VPRecipeWithIRFlags>(R)->getPredicate();
     assert((!Result || getHashValue(L) == getHashValue(R)) &&
            "Divergent hashes of equal values");
     return Result;

llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll

@@ -101,7 +101,8 @@ define void @single_incoming_phi_with_blend_mask(i64 %a, i64 %b) {
 ; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
 ; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr [32 x i16], ptr @src, i16 0, i16 [[TMP1]]
 ; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <2 x i16>, ptr [[TMP4]], align 1
-; CHECK-NEXT:    [[TMP7:%.*]] = select <2 x i1> [[TMP3]], <2 x i1> [[TMP3]], <2 x i1> zeroinitializer
+; CHECK-NEXT:    [[TMP6:%.*]] = icmp sle <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; CHECK-NEXT:    [[TMP7:%.*]] = select <2 x i1> [[TMP3]], <2 x i1> [[TMP6]], <2 x i1> zeroinitializer
 ; CHECK-NEXT:    [[PREDPHI:%.*]] = select <2 x i1> [[TMP7]], <2 x i16> [[WIDE_LOAD]], <2 x i16> splat (i16 1)
 ; CHECK-NEXT:    [[PREDPHI1:%.*]] = select <2 x i1> [[TMP3]], <2 x i16> [[PREDPHI]], <2 x i16> zeroinitializer
 ; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[INDEX]]
@@ -285,7 +286,8 @@ define void @single_incoming_needs_predication(i64 %a, i64 %b) {
 ; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE2]]
 ; CHECK:       pred.load.continue2:
 ; CHECK-NEXT:    [[TMP14:%.*]] = phi <2 x i16> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP13]], [[PRED_LOAD_IF1]] ]
-; CHECK-NEXT:    [[TMP16:%.*]] = select <2 x i1> [[TMP2]], <2 x i1> [[TMP2]], <2 x i1> zeroinitializer
+; CHECK-NEXT:    [[TMP15:%.*]] = icmp sle <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; CHECK-NEXT:    [[TMP16:%.*]] = select <2 x i1> [[TMP2]], <2 x i1> [[TMP15]], <2 x i1> zeroinitializer
 ; CHECK-NEXT:    [[PREDPHI:%.*]] = select <2 x i1> [[TMP16]], <2 x i16> [[TMP14]], <2 x i16> splat (i16 1)
 ; CHECK-NEXT:    [[PREDPHI3:%.*]] = select <2 x i1> [[TMP2]], <2 x i16> [[PREDPHI]], <2 x i16> zeroinitializer
 ; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[INDEX]]