@@ -70,6 +70,108 @@ define <2 x i64> @freeze_zext_vec(<2 x i16> %a0) nounwind {
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ret <2 x i64 > %z
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}
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+ define i32 @freeze_abs (i32 %a0 ) nounwind {
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+ ; X86-LABEL: freeze_abs:
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+ ; X86: # %bb.0:
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+ ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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+ ; X86-NEXT: movl %eax, %ecx
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+ ; X86-NEXT: negl %ecx
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+ ; X86-NEXT: cmovsl %eax, %ecx
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+ ; X86-NEXT: movl %ecx, %eax
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+ ; X86-NEXT: negl %eax
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+ ; X86-NEXT: cmovsl %ecx, %eax
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+ ; X86-NEXT: retl
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+ ;
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+ ; X64-LABEL: freeze_abs:
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+ ; X64: # %bb.0:
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+ ; X64-NEXT: movl %edi, %ecx
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+ ; X64-NEXT: negl %ecx
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+ ; X64-NEXT: cmovsl %edi, %ecx
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+ ; X64-NEXT: movl %ecx, %eax
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+ ; X64-NEXT: negl %eax
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+ ; X64-NEXT: cmovsl %ecx, %eax
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+ ; X64-NEXT: retq
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+ %x = call i32 @llvm.abs.i32 (i32 %a0 , i1 0 )
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+ %f = freeze i32 %x
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+ %r = call i32 @llvm.abs.i32 (i32 %f , i1 0 )
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+ ret i32 %r
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+ }
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+
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+ define <4 x i32 > @freeze_abs_vec (<4 x i32 > %a0 ) nounwind {
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+ ; X86-LABEL: freeze_abs_vec:
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+ ; X86: # %bb.0:
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+ ; X86-NEXT: movdqa %xmm0, %xmm1
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+ ; X86-NEXT: psrad $31, %xmm1
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+ ; X86-NEXT: pxor %xmm1, %xmm0
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+ ; X86-NEXT: psubd %xmm1, %xmm0
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+ ; X86-NEXT: movdqa %xmm0, %xmm1
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+ ; X86-NEXT: psrad $31, %xmm1
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+ ; X86-NEXT: pxor %xmm1, %xmm0
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+ ; X86-NEXT: psubd %xmm1, %xmm0
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+ ; X86-NEXT: retl
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+ ;
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+ ; X64-LABEL: freeze_abs_vec:
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+ ; X64: # %bb.0:
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+ ; X64-NEXT: pabsd %xmm0, %xmm0
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+ ; X64-NEXT: pabsd %xmm0, %xmm0
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+ ; X64-NEXT: retq
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+ %x = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %a0 , i1 0 )
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+ %f = freeze <4 x i32 > %x
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+ %r = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %f , i1 0 )
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+ ret <4 x i32 > %r
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+ }
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+
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+ define i32 @freeze_abs_undef (i32 %a0 ) nounwind {
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+ ; X86-LABEL: freeze_abs_undef:
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+ ; X86: # %bb.0:
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+ ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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+ ; X86-NEXT: movl %eax, %ecx
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+ ; X86-NEXT: negl %ecx
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+ ; X86-NEXT: cmovsl %eax, %ecx
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+ ; X86-NEXT: movl %ecx, %eax
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+ ; X86-NEXT: negl %eax
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+ ; X86-NEXT: cmovsl %ecx, %eax
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+ ; X86-NEXT: retl
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+ ;
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+ ; X64-LABEL: freeze_abs_undef:
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+ ; X64: # %bb.0:
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+ ; X64-NEXT: movl %edi, %ecx
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+ ; X64-NEXT: negl %ecx
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+ ; X64-NEXT: cmovsl %edi, %ecx
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+ ; X64-NEXT: movl %ecx, %eax
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+ ; X64-NEXT: negl %eax
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+ ; X64-NEXT: cmovsl %ecx, %eax
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+ ; X64-NEXT: retq
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+ %x = call i32 @llvm.abs.i32 (i32 %a0 , i1 -1 )
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+ %f = freeze i32 %x
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+ %r = call i32 @llvm.abs.i32 (i32 %f , i1 -1 )
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+ ret i32 %r
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+ }
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+
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+ define <4 x i32 > @freeze_abs_undef_vec (<4 x i32 > %a0 ) nounwind {
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+ ; X86-LABEL: freeze_abs_undef_vec:
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+ ; X86: # %bb.0:
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+ ; X86-NEXT: movdqa %xmm0, %xmm1
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+ ; X86-NEXT: psrad $31, %xmm1
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+ ; X86-NEXT: pxor %xmm1, %xmm0
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+ ; X86-NEXT: psubd %xmm1, %xmm0
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+ ; X86-NEXT: movdqa %xmm0, %xmm1
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+ ; X86-NEXT: psrad $31, %xmm1
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+ ; X86-NEXT: pxor %xmm1, %xmm0
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+ ; X86-NEXT: psubd %xmm1, %xmm0
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+ ; X86-NEXT: retl
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+ ;
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+ ; X64-LABEL: freeze_abs_undef_vec:
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+ ; X64: # %bb.0:
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+ ; X64-NEXT: pabsd %xmm0, %xmm0
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+ ; X64-NEXT: pabsd %xmm0, %xmm0
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+ ; X64-NEXT: retq
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+ %x = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %a0 , i1 -1 )
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+ %f = freeze <4 x i32 > %x
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+ %r = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %f , i1 -1 )
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+ ret <4 x i32 > %r
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+ }
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+
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define i32 @freeze_bswap (i32 %a0 ) nounwind {
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; X86-LABEL: freeze_bswap:
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; X86: # %bb.0:
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