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[RISCV] Address post commit style suggestion
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llvm/lib/Target/RISCV/RISCVISelLowering.cpp

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@@ -20886,7 +20886,7 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
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/*VL=*/Tuple.getOperand(5),
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/*Policy=*/Tuple.getOperand(6)};
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auto TupleMemSD = cast<MemIntrinsicSDNode>(Tuple);
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auto *TupleMemSD = cast<MemIntrinsicSDNode>(Tuple);
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// Match getTgtMemIntrinsic for non-unit stride case
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EVT MemVT = TupleMemSD->getMemoryVT().getScalarType();
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MachineFunction &MF = DAG.getMachineFunction();

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