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[NFC][AMDGPU] Align all gfx1250 VOP1 MC tests with downstream (#149567)
This PR adds all VOP1 tests that haven't yet been upstreamed by copying the relevant test files directly from downstream. Afterward, the auto-generation script is run with the `--unique` option to deduplicate any redundant tests that may have been introduced during the downstream merge. Co-authored-by: Mekhanoshin, Stanislav <[email protected]> Co-authored-by: Mekhanoshin, Stanislav <[email protected]>
1 parent fb5c94e commit ffb4539

9 files changed

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-621
lines changed

‎llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -664,6 +664,45 @@ v_cvt_f32_fp8_e32 v1, 3
664664
v_cvt_f32_fp8_e32 v1, v3
665665
// GFX1250: v_cvt_f32_fp8_e32 v1, v3 ; encoding: [0x03,0xd9,0x02,0x7e]
666666

667+
v_cvt_pk_f32_bf8_e32 v[2:3], s3
668+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[2:3], s3 ; encoding: [0x03,0xde,0x04,0x7e]
669+
670+
v_cvt_pk_f32_bf8_e32 v[4:5], s5
671+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[4:5], s5 ; encoding: [0x05,0xde,0x08,0x7e]
672+
673+
v_cvt_pk_f32_bf8_e32 v[2:3], 3
674+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[2:3], 3 ; encoding: [0x83,0xde,0x04,0x7e]
675+
676+
v_cvt_pk_f32_bf8_e32 v[4:5], 3
677+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[4:5], 3 ; encoding: [0x83,0xde,0x08,0x7e]
678+
679+
v_cvt_pk_f32_bf8_e32 v[2:3], v3
680+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[2:3], v3 ; encoding: [0x03,0xdf,0x04,0x7e]
681+
682+
v_cvt_pk_f32_bf8_e32 v[4:5], v3
683+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[4:5], v3 ; encoding: [0x03,0xdf,0x08,0x7e]
684+
685+
v_cvt_pk_f32_bf8_e32 v[4:5], v127.h
686+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[4:5], v127.h ; encoding: [0xff,0xdf,0x08,0x7e]
687+
688+
v_cvt_pk_f32_bf8_e32 v[4:5], v127.l
689+
// GFX1250: v_cvt_pk_f32_bf8_e32 v[4:5], v127.l ; encoding: [0x7f,0xdf,0x08,0x7e]
690+
691+
v_cvt_pk_f32_fp8_e32 v[2:3], s3
692+
// GFX1250: v_cvt_pk_f32_fp8_e32 v[2:3], s3 ; encoding: [0x03,0xdc,0x04,0x7e]
693+
694+
v_cvt_pk_f32_fp8_e32 v[2:3], 3
695+
// GFX1250: v_cvt_pk_f32_fp8_e32 v[2:3], 3 ; encoding: [0x83,0xdc,0x04,0x7e]
696+
697+
v_cvt_pk_f32_fp8_e32 v[2:3], v3
698+
// GFX1250: v_cvt_pk_f32_fp8_e32 v[2:3], v3 ; encoding: [0x03,0xdd,0x04,0x7e]
699+
700+
v_cvt_pk_f32_fp8_e32 v[4:5], v127.h
701+
// GFX1250: v_cvt_pk_f32_fp8_e32 v[4:5], v127.h ; encoding: [0xff,0xdd,0x08,0x7e]
702+
703+
v_cvt_pk_f32_fp8_e32 v[4:5], v127.l
704+
// GFX1250: v_cvt_pk_f32_fp8_e32 v[4:5], v127.l ; encoding: [0x7f,0xdd,0x08,0x7e]
705+
667706
v_sat_pk4_i4_i8 v1, v2
668707
// GFX1250: v_sat_pk4_i4_i8_e32 v1, v2 ; encoding: [0x02,0xe7,0x02,0x7e]
669708

‎llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s

Lines changed: 3681 additions & 108 deletions
Large diffs are not rendered by default.

‎llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s

Lines changed: 3827 additions & 86 deletions
Large diffs are not rendered by default.

‎llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -186,10 +186,6 @@ v_cvt_f16_bf8 v1, v2 byte_sel:1 dpp8:[7,6,5,4,3,2,1,0]
186186
// GFX1250: v_cvt_f16_bf8_e64_dpp v1, v2 byte_sel:1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x01,0x10,0xf8,0xd5,0xe9,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
187187
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
188188

189-
v_cvt_f16_bf8 v150, v2 dpp8:[7,6,5,4,3,2,1,0]
190-
// GFX1250: v_cvt_f16_bf8_e64_dpp v150, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x96,0x00,0xf8,0xd5,0xe9,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
191-
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
192-
193189
v_cvt_f16_bf8 v150, v2 byte_sel:3 dpp8:[7,6,5,4,3,2,1,0] fi:1
194190
// GFX1250: v_cvt_f16_bf8_e64_dpp v150, v2 byte_sel:3 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x96,0x18,0xf8,0xd5,0xea,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
195191
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

‎llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -202,18 +202,6 @@ v_cos_bf16_e64_dpp v5.h, v128.h dpp8:[7,6,5,4,3,2,1,0]
202202
// GFX1250: v_cos_bf16_e64_dpp v5.h, v128.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x48,0xff,0xd5,0xe9,0x00,0x00,0x00,0x80,0x77,0x39,0x05]
203203
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
204204

205-
v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
206-
// GFX1250: v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0xf2,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
207-
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
208-
209-
v_cvt_f32_bf16_e64_dpp v5, v128.h dpp8:[7,6,5,4,3,2,1,0]
210-
// GFX1250: v_cvt_f32_bf16_e64_dpp v5, v128.h op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0xe9,0x00,0x00,0x00,0x80,0x77,0x39,0x05]
211-
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
212-
213-
v_cvt_f16_bf8 v150.l, v2 dpp8:[7,6,5,4,3,2,1,0]
214-
// GFX1250: v_cvt_f16_bf8_e64_dpp v150.l, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x96,0x00,0xf8,0xd5,0xe9,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
215-
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
216-
217205
v_cvt_f16_bf8 v1.l, v2 byte_sel:3 dpp8:[7,6,5,4,3,2,1,0]
218206
// GFX1250: v_cvt_f16_bf8_e64_dpp v1.l, v2 byte_sel:3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x01,0x18,0xf8,0xd5,0xe9,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
219207
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
@@ -274,6 +262,14 @@ v_cvt_f16_fp8 v128.l, v2 dpp8:[7,6,5,4,3,2,1,0]
274262
// GFX1250: v_cvt_f16_fp8_e64_dpp v128.l, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x80,0x00,0xf7,0xd5,0xe9,0x00,0x00,0x00,0x02,0x77,0x39,0x05]
275263
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
276264

265+
v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
266+
// GFX1250: v_cvt_f32_bf16_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0xf2,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
267+
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
268+
269+
v_cvt_f32_bf16_e64_dpp v5, v128.h dpp8:[7,6,5,4,3,2,1,0]
270+
// GFX1250: v_cvt_f32_bf16_e64_dpp v5, v128.h op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x08,0xf2,0xd5,0xe9,0x00,0x00,0x00,0x80,0x77,0x39,0x05]
271+
// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
272+
277273
v_cvt_f32_fp8 v1, v3 clamp dpp8:[7,6,5,4,3,2,1,0]
278274
// GFX1250: v_cvt_f32_fp8_e64_dpp v1, v3 clamp dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x01,0x80,0xec,0xd5,0xe9,0x00,0x00,0x00,0x03,0x77,0x39,0x05]
279275
// GFX12-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction

‎llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt

Lines changed: 49 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -810,6 +810,52 @@
810810
0x03,0xd9,0x02,0x7e
811811
# GFX1250: v_cvt_f32_fp8_e32 v1, v3 ; encoding: [0x03,0xd9,0x02,0x7e]
812812

813+
0x03,0xde,0x04,0x7e
814+
# GFX1250: v_cvt_pk_f32_bf8_e32 v[2:3], s3 ; encoding: [0x03,0xde,0x04,0x7e]
815+
816+
0x83,0xde,0x04,0x7e
817+
# GFX1250: v_cvt_pk_f32_bf8_e32 v[2:3], 3 ; encoding: [0x83,0xde,0x04,0x7e]
818+
819+
0x03,0xdf,0x04,0x7e
820+
# GFX1250-REAL16: v_cvt_pk_f32_bf8_e32 v[2:3], v3.l ; encoding: [0x03,0xdf,0x04,0x7e]
821+
# GFX1250-FAKE16: v_cvt_pk_f32_bf8_e32 v[2:3], v3 ; encoding: [0x03,0xdf,0x04,0x7e]
822+
823+
0x05,0xde,0x08,0x7e
824+
# GFX1250: v_cvt_pk_f32_bf8_e32 v[4:5], s5 ; encoding: [0x05,0xde,0x08,0x7e]
825+
826+
0x83,0xde,0x08,0x7e
827+
# GFX1250: v_cvt_pk_f32_bf8_e32 v[4:5], 3 ; encoding: [0x83,0xde,0x08,0x7e]
828+
829+
0x03,0xdf,0x08,0x7e
830+
# GFX1250-REAL16: v_cvt_pk_f32_bf8_e32 v[4:5], v3.l ; encoding: [0x03,0xdf,0x08,0x7e]
831+
# GFX1250-FAKE16: v_cvt_pk_f32_bf8_e32 v[4:5], v3 ; encoding: [0x03,0xdf,0x08,0x7e]
832+
833+
0xff,0xdf,0x08,0x7e
834+
# GFX1250-REAL16: v_cvt_pk_f32_bf8_e32 v[4:5], v127.h ; encoding: [0xff,0xdf,0x08,0x7e]
835+
# GFX1250-FAKE16: v_cvt_pk_f32_bf8_e32 v[4:5], v255/*Invalid register, operand has 'VS_32_Lo128' register class*/ ; encoding: [0xff,0xdf,0x08,0x7e]
836+
837+
0x7f,0xdf,0x08,0x7e
838+
# GFX1250-REAL16: v_cvt_pk_f32_bf8_e32 v[4:5], v127.l ; encoding: [0x7f,0xdf,0x08,0x7e]
839+
# GFX1250-FAKE16: v_cvt_pk_f32_bf8_e32 v[4:5], v127 ; encoding: [0x7f,0xdf,0x08,0x7e]
840+
841+
0x03,0xdc,0x04,0x7e
842+
# GFX1250: v_cvt_pk_f32_fp8_e32 v[2:3], s3 ; encoding: [0x03,0xdc,0x04,0x7e]
843+
844+
0x83,0xdc,0x04,0x7e
845+
# GFX1250: v_cvt_pk_f32_fp8_e32 v[2:3], 3 ; encoding: [0x83,0xdc,0x04,0x7e]
846+
847+
0x03,0xdd,0x04,0x7e
848+
# GFX1250-REAL16: v_cvt_pk_f32_fp8_e32 v[2:3], v3.l ; encoding: [0x03,0xdd,0x04,0x7e]
849+
# GFX1250-FAKE16: v_cvt_pk_f32_fp8_e32 v[2:3], v3 ; encoding: [0x03,0xdd,0x04,0x7e]
850+
851+
0xff,0xdd,0x08,0x7e
852+
# GFX1250-REAL16: v_cvt_pk_f32_fp8_e32 v[4:5], v127.h ; encoding: [0xff,0xdd,0x08,0x7e]
853+
# GFX1250-FAKE16: v_cvt_pk_f32_fp8_e32 v[4:5], v255/*Invalid register, operand has 'VS_32_Lo128' register class*/ ; encoding: [0xff,0xdd,0x08,0x7e]
854+
855+
0x7f,0xdd,0x08,0x7e
856+
# GFX1250-REAL16: v_cvt_pk_f32_fp8_e32 v[4:5], v127.l ; encoding: [0x7f,0xdd,0x08,0x7e]
857+
# GFX1250-FAKE16: v_cvt_pk_f32_fp8_e32 v[4:5], v127 ; encoding: [0x7f,0xdd,0x08,0x7e]
858+
813859
0xff,0xe6,0x02,0x7e,0x34,0x12,0x00,0x00
814860
# GFX1250-REAL16: v_sat_pk4_i4_i8_e32 v1.l, 0x1234 ; encoding: [0xff,0xe6,0x02,0x7e,0x34,0x12,0x00,0x00]
815861
# GFX1250-FAKE16: v_sat_pk4_i4_i8_e32 v1, 0x1234 ; encoding: [0xff,0xe6,0x02,0x7e,0x34,0x12,0x00,0x00]
@@ -845,9 +891,8 @@
845891
# GFX1250-REAL16: v_sat_pk4_u4_u8_e32 v1.l, v2 ; encoding: [0x02,0xe9,0x02,0x7e]
846892
# GFX1250-FAKE16: v_sat_pk4_u4_u8_e32 v1, v2 ; encoding: [0x02,0xe9,0x02,0x7e]
847893

848-
0xff,0xe8,0x02,0x7e,0x34,0x12,0x00,0x00
849-
# GFX1250-REAL16: v_sat_pk4_u4_u8_e32 v1.l, 0x1234 ; encoding: [0xff,0xe8,0x02,0x7e,0x34,0x12,0x00,0x00]
850-
# GFX1250-FAKE16: v_sat_pk4_u4_u8_e32 v1, 0x1234 ; encoding: [0xff,0xe8,0x02,0x7e,0x34,0x12,0x00,0x00]
851-
852894
0x02,0xe9,0x02,0x7f
853895
# GFX1250-REAL16: v_sat_pk4_u4_u8_e32 v1.h, v2 ; encoding: [0x02,0xe9,0x02,0x7f]
896+
897+
0x02,0x93,0x02,0x7e
898+
# GFX1250: v_permlane16_swap_b32_e32 v1, v2 ; encoding: [0x02,0x93,0x02,0x7e]

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