Search results

[BOLT][RISCV]Fix handling of GOT relocation pairs

backend:RISC-V

BOLT

Status: Open (in progress).

llvm/llvm-projectnumber 149658

#149658 In llvm/llvm-project;

· dinyy opened on Jul 19, 2025

[IA] Support vp.store in lowerinterleavedStore

backend:AArch64

backend:ARM

backend:RISC-V

backend:X86

llvm:codegen

Status: Open (in progress).

llvm/llvm-projectnumber 149605

#149605 In llvm/llvm-project;

· preames opened on Jul 18, 2025

[RISCV] Separate the analysis part of RISCVInsertVSETVLI.

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 149574

#149574 In llvm/llvm-project;

· mgudim opened on Jul 18, 2025

[SLP]Check for extracts, being replaced by original scalares, for user nodes

backend:RISC-V

llvm:transforms

vectorizers

Status: Open (in progress).

llvm/llvm-projectnumber 149572

#149572 In llvm/llvm-project;

· alexey-bataev opened on Jul 18, 2025

[RISCV][VLOPT] Added support for vmv and vfmv

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 149562

#149562 In llvm/llvm-project;

· mikhailramalho opened on Jul 18, 2025

[RISCV][IA] Support masked.load for deinterleaveN matching

backend:RISC-V

llvm:codegen

Status: Open (in progress).

llvm/llvm-projectnumber 149556

#149556 In llvm/llvm-project;

· preames opened on Jul 18, 2025

[RISCV][llvm] Handle vector callee saved register correctly

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 149467

#149467 In llvm/llvm-project;

· 4vtomat opened on Jul 18, 2025

MC: Refactor FT_Align fragments when linker relaxation is enabled

backend:loongarch

backend:RISC-V

mcMachine (object) codeMachine (object) code

Status: Open (in progress).

llvm/llvm-projectnumber 149465

#149465 In llvm/llvm-project;

· MaskRay opened on Jul 18, 2025

[RISCV] add load/store misched/PostRA cluster options

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 149409

#149409 In llvm/llvm-project;

· danielhb opened on Jul 17, 2025

[RISCV] Handle recurrences in VLOptimizer

backend:RISC-V

Status: Open.

#149354 In llvm/llvm-project;

· lukel97 opened on Jul 17, 2025

release/21.x: [RISCV] Pass the MachineInstr flag as argument to allocateStack (#147531)

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 149352

#149352 In llvm/llvm-project;

· llvmbot opened on Jul 17, 2025

· 

LLVM 21.x Release

[RISCV] Propagate VL from segment store in VLoptimizer

backend:RISC-V

Status: Open.

#149350 In llvm/llvm-project;

· topperc opened on Jul 17, 2025