diff --git a/llvm/test/CodeGen/SPIRV/image_store.ll b/llvm/test/CodeGen/SPIRV/image_store.ll
new file mode 100644
index 0000000000000..73ea6ad038de7
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/image_store.ll
@@ -0,0 +1,22 @@
+; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; Image types may be represented in two ways while translating to SPIR-V:
+; - OpenCL form, for example, '%opencl.image2d_ro_t',
+; - SPIR-V form, for example, '%spirv.Image._void_1_0_0_0_0_0_0',
+; but it is still one type which should be translated to one SPIR-V type.
+;
+; The test checks that the code below is successfully translated and only one
+; SPIR-V type for images is generated.
+
+; CHECK:     %[[#]] = OpTypeImage %[[#]] 2D
+; CHECK-NOT: %[[#]] = OpTypeImage %[[#]] 2D
+
+declare spir_func <4 x float> @_Z11read_imagef14ocl_image2d_ro11ocl_samplerDv2_ff(ptr addrspace(1), ptr addrspace(2), <2 x float>, float)
+
+define spir_kernel void @read_image(ptr addrspace(1) %srcimg, ptr addrspace(2) %sampler){
+entry:
+  %spirvimg.addr = alloca target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 0), align 8
+  %val = call <4 x float> @_Z11read_imagef14ocl_image2d_ro11ocl_samplerDv2_ff(ptr addrspace(1) %srcimg, ptr addrspace(2) %sampler, <2 x float> zeroinitializer, float 0.0)
+  ret void
+}
diff --git a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
new file mode 100644
index 0000000000000..52f939faf0a9f
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
@@ -0,0 +1,30 @@
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -filetype=obj -o - | spirv-val %}
+; XFAIL: *
+;@llvm.sadd.with.overflow and @llvm.ssub.with.overflow has not been implemented.
+
+define spir_func void @test_sadd_overflow(ptr %out_result, ptr %out_overflow, i32 %a, i32 %b) {
+entry:
+  %res = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
+  %val = extractvalue { i32, i1 } %res, 0
+  %ofl = extractvalue { i32, i1 } %res, 1
+  store i32 %val, ptr %out_result
+  %zext_ofl = zext i1 %ofl to i8
+  store i8 %zext_ofl, ptr %out_overflow
+  ret void
+}
+
+declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32)
+
+define spir_func void @test_ssub_overflow(ptr %out_result, ptr %out_overflow, i32 %a, i32 %b) {
+entry:
+  %res = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
+  %val = extractvalue { i32, i1 } %res, 0
+  %ofl = extractvalue { i32, i1 } %res, 1
+  store i32 %val, ptr %out_result
+  %zext_ofl = zext i1 %ofl to i8
+  store i8 %zext_ofl, ptr %out_overflow
+  ret void
+}
+
+declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32)
diff --git a/llvm/test/CodeGen/SPIRV/spirv_global_variable_decoration.ll b/llvm/test/CodeGen/SPIRV/spirv_global_variable_decoration.ll
new file mode 100644
index 0000000000000..ce5ed087650cd
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/spirv_global_variable_decoration.ll
@@ -0,0 +1,29 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+@v1 = addrspace(1) global i32 42, !spirv.Decorations !2
+@v2 = addrspace(1) global float 1.0, !spirv.Decorations !4
+
+define i32 @use_globals() {
+entry:
+  %v1_ptr = addrspacecast i32 addrspace(1)* @v1 to i32*
+  %v1_val = load i32, i32* %v1_ptr
+
+  %v2_ptr = addrspacecast float addrspace(1)* @v2 to float*
+  %v2_val = load float, float* %v2_ptr
+  %v2_int = fptosi float %v2_val to i32
+
+  %sum = add i32 %v1_val, %v2_int
+  ret i32 %sum
+}
+
+; CHECK: OpDecorate %[[#PId1:]] Constant
+; CHECK: OpDecorate %[[#PId2:]] Constant
+; CHECK: OpDecorate %[[#PId2]] Binding 1
+; CHECK: %[[#PId1]] = OpVariable %[[#]] CrossWorkgroup %[[#]]
+; CHECK: %[[#PId2]] = OpVariable %[[#]] CrossWorkgroup %[[#]]
+
+!1 = !{i32 22}                          ; Constant
+!2 = !{!1}                             ; @v1
+!3 = !{i32 33, i32 1}                  ; Binding 1
+!4 = !{!1, !3}                         ; @v2