Skip to content

Commit 5cb1a01

Browse files
bob80905bob80905
authored
Merge branch 'main' into add_distance_tests
2 parents d0cdcaf + 0d68704 commit 5cb1a01

15 files changed

+1150
-0
lines changed

‎test/Feature/HLSLLib/abs.32.test

Lines changed: 142 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,142 @@
1+
#--- source.hlsl
2+
3+
StructuredBuffer<int4> In1 : register(t0);
4+
StructuredBuffer<uint4> In2 : register(t1);
5+
StructuredBuffer<float4> In3 : register(t2);
6+
RWStructuredBuffer<int4> Out1 : register(u3);
7+
RWStructuredBuffer<uint4> Out2 : register(u4);
8+
RWStructuredBuffer<float4> Out3 : register(u5);
9+
10+
[numthreads(1,1,1)]
11+
void main() {
12+
// int
13+
Out1[0] = abs(In1[0]);
14+
int4 Tmp = {abs(In1[0].xyz), abs(In1[0].w)};
15+
Out1[1] = Tmp;
16+
Out1[2].xy = abs(In1[0].xy);
17+
18+
// uint
19+
Out2[0] = abs(In2[0]);
20+
uint4 Tmp2 = {abs(In2[0].xyz), abs(In2[0].w)};
21+
Out2[1] = Tmp2;
22+
Out2[2].xy = abs(In2[0].xy);
23+
24+
// float
25+
Out3[0] = abs(In3[0]);
26+
float4 Tmp3 = {abs(In3[1].xyz), abs(In3[1].w)};
27+
Out3[1] = Tmp3;
28+
float4 Tmp4 = {abs(In3[2].xy), abs(In3[2].zw)};
29+
Out3[2] = Tmp4;
30+
}
31+
32+
//--- pipeline.yaml
33+
34+
---
35+
Shaders:
36+
- Stage: Compute
37+
Entry: main
38+
DispatchSize: [1, 1, 1]
39+
Buffers:
40+
- Name: In1
41+
Format: Int32
42+
Stride: 16
43+
Data: [-1, 0, -2147483648, 2147483647]
44+
- Name: In2
45+
Format: UInt32
46+
Stride: 16
47+
Data: [1, 0xffffffff, 0, 10]
48+
- Name: In3
49+
Format: Float32
50+
Stride: 16
51+
Data: [nan, -nan, 0, -0, -1.3, inf, -inf, 0x1.e7d42cp-127, -0x1.e7d42cp-127, -0.5, -0.05, -19]
52+
- Name: Out1
53+
Format: Int32
54+
Stride: 16
55+
ZeroInitSize: 48
56+
- Name: ExpectedOut1 # The result we expect
57+
Format: Int32
58+
Stride: 16
59+
Data: [1, 0, -2147483648, 2147483647, 1, 0, -2147483648, 2147483647, 1, 0, 0, 0] # Last two are filler
60+
- Name: Out2
61+
Format: UInt32
62+
Stride: 16
63+
ZeroInitSize: 48
64+
- Name: ExpectedOut2 # The result we expect
65+
Format: UInt32
66+
Stride: 16
67+
Data: [1, 4294967295, 0, 10, 1, 4294967295, 0, 10, 1, 4294967295, 0, 0] # Last two are filler
68+
- Name: Out3
69+
Format: Float32
70+
Stride: 16
71+
ZeroInitSize: 48
72+
- Name: ExpectedOut3 # The result we expect
73+
Format: Float32
74+
Stride: 16
75+
Data: [nan, nan, 0, 0, 1.3, inf, inf, 0x1.e7d42cp-127, 0x1.e7d42cp-127, 0.5, 0.05, 19]
76+
Results:
77+
- Result: Test1
78+
Rule: BufferExact
79+
Actual: Out1
80+
Expected: ExpectedOut1
81+
- Result: Test2
82+
Rule: BufferExact
83+
Actual: Out2
84+
Expected: ExpectedOut2
85+
- Result: Test3
86+
Rule: BufferFloatULP
87+
ULPT: 0
88+
Actual: Out3
89+
Expected: ExpectedOut3
90+
DescriptorSets:
91+
- Resources:
92+
- Name: In1
93+
Kind: StructuredBuffer
94+
DirectXBinding:
95+
Register: 0
96+
Space: 0
97+
VulkanBinding:
98+
Binding: 0
99+
- Name: In2
100+
Kind: StructuredBuffer
101+
DirectXBinding:
102+
Register: 1
103+
Space: 0
104+
VulkanBinding:
105+
Binding: 1
106+
- Name: In3
107+
Kind: StructuredBuffer
108+
DirectXBinding:
109+
Register: 2
110+
Space: 0
111+
VulkanBinding:
112+
Binding: 2
113+
- Name: Out1
114+
Kind: RWStructuredBuffer
115+
DirectXBinding:
116+
Register: 3
117+
Space: 0
118+
VulkanBinding:
119+
Binding: 3
120+
- Name: Out2
121+
Kind: RWStructuredBuffer
122+
DirectXBinding:
123+
Register: 4
124+
Space: 0
125+
VulkanBinding:
126+
Binding: 4
127+
- Name: Out3
128+
Kind: RWStructuredBuffer
129+
DirectXBinding:
130+
Register: 5
131+
Space: 0
132+
VulkanBinding:
133+
Binding: 5
134+
...
135+
#--- end
136+
137+
# https://github.com/microsoft/DirectXShaderCompiler/issues/7512
138+
# XFAIL: DXC-Vulkan
139+
140+
# RUN: split-file %s %t
141+
# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
142+
# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Feature/HLSLLib/abs.fp16.test

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,64 @@
1+
#--- source.hlsl
2+
3+
StructuredBuffer<half4> In1 : register(t0);
4+
RWStructuredBuffer<half4> Out1 : register(u1);
5+
6+
[numthreads(1,1,1)]
7+
void main() {
8+
Out1[0] = abs(In1[0]);
9+
half4 Tmp = {abs(In1[1].xyz), abs(In1[1].w)};
10+
Out1[1] = Tmp;
11+
half4 Tmp2 = {abs(In1[2].xy), abs(In1[2].zw)};
12+
Out1[2] = Tmp2;
13+
}
14+
15+
//--- pipeline.yaml
16+
17+
---
18+
Shaders:
19+
- Stage: Compute
20+
Entry: main
21+
DispatchSize: [1, 1, 1]
22+
Buffers:
23+
- Name: In1
24+
Format: Float16
25+
Stride: 8
26+
Data: [0x7e00, 0xfe00, 0x0000, 0x8000, 0xbd33, 0x7c00, 0xfc00, 0x0001, 0x8001, 0xb800, 0xaa66, 0xccc0]
27+
# nan, -nan, 0, -0, -1.3, inf, -inf, denorm, -denorm, -0.5, -0.05, -19
28+
- Name: Out1
29+
Format: Float16
30+
Stride: 8
31+
ZeroInitSize: 24
32+
- Name: ExpectedOut1 # The result we expect
33+
Format: Float16
34+
Stride: 8
35+
Data: [0x7e00, 0x7e00, 0x0000, 0x0000, 0x3d33, 0x7c00, 0x7c00, 0x0001, 0x0001, 0x3800, 0x2a66, 0x4cc0]
36+
Results:
37+
- Result: Test1
38+
Rule: BufferFloatULP
39+
ULPT: 0
40+
Actual: Out1
41+
Expected: ExpectedOut1
42+
DescriptorSets:
43+
- Resources:
44+
- Name: In1
45+
Kind: StructuredBuffer
46+
DirectXBinding:
47+
Register: 0
48+
Space: 0
49+
VulkanBinding:
50+
Binding: 0
51+
- Name: Out1
52+
Kind: RWStructuredBuffer
53+
DirectXBinding:
54+
Register: 1
55+
Space: 0
56+
VulkanBinding:
57+
Binding: 1
58+
...
59+
#--- end
60+
61+
# REQUIRES: Half
62+
# RUN: split-file %s %t
63+
# RUN: %dxc_target -enable-16bit-types -T cs_6_5 -Fo %t.o %t/source.hlsl
64+
# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Feature/HLSLLib/abs.fp64.test

Lines changed: 63 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,63 @@
1+
#--- source.hlsl
2+
3+
StructuredBuffer<double4> In1 : register(t0);
4+
RWStructuredBuffer<double4> Out1 : register(u1);
5+
6+
[numthreads(1,1,1)]
7+
void main() {
8+
Out1[0] = abs(In1[0]);
9+
double4 Tmp = {abs(In1[1].xyz), abs(In1[1].w)};
10+
Out1[1] = Tmp;
11+
double4 Tmp2 = {abs(In1[2].xy), abs(In1[2].zw)};
12+
Out1[2] = Tmp2;
13+
}
14+
15+
//--- pipeline.yaml
16+
17+
---
18+
Shaders:
19+
- Stage: Compute
20+
Entry: main
21+
DispatchSize: [1, 1, 1]
22+
Buffers:
23+
- Name: In1
24+
Format: Float64
25+
Stride: 32
26+
Data: [nan, -nan, 0, -0, -1.3, inf, -inf, 0x0.fffffffffffffp-1022, -0x0.fffffffffffffp-1022, -0.5, -0.05, -19]
27+
- Name: Out1
28+
Format: Float64
29+
Stride: 32
30+
ZeroInitSize: 96
31+
- Name: ExpectedOut1 # The result we expect
32+
Format: Float64
33+
Stride: 32
34+
Data: [nan, nan, 0, 0, 1.3, inf, inf, 0x0.fffffffffffffp-1022, 0x0.fffffffffffffp-1022, 0.5, 0.05, 19]
35+
Results:
36+
- Result: Test1
37+
Rule: BufferFloatULP
38+
ULPT: 0
39+
Actual: Out1
40+
Expected: ExpectedOut1
41+
DescriptorSets:
42+
- Resources:
43+
- Name: In1
44+
Kind: StructuredBuffer
45+
DirectXBinding:
46+
Register: 0
47+
Space: 0
48+
VulkanBinding:
49+
Binding: 0
50+
- Name: Out1
51+
Kind: RWStructuredBuffer
52+
DirectXBinding:
53+
Register: 1
54+
Space: 0
55+
VulkanBinding:
56+
Binding: 1
57+
...
58+
#--- end
59+
60+
# REQUIRES: Double
61+
# RUN: split-file %s %t
62+
# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
63+
# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Feature/HLSLLib/abs.int16.test

Lines changed: 103 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,103 @@
1+
#--- source.hlsl
2+
3+
StructuredBuffer<int16_t4> In1 : register(t0);
4+
StructuredBuffer<uint16_t4> In2 : register(t1);
5+
RWStructuredBuffer<int16_t4> Out1 : register(u2);
6+
RWStructuredBuffer<uint16_t4> Out2 : register(u3);
7+
8+
[numthreads(1,1,1)]
9+
void main() {
10+
// int16_t
11+
Out1[0] = abs(In1[0]);
12+
int16_t4 Tmp = {abs(In1[0].xyz), abs(In1[0].w)};
13+
Out1[1] = Tmp;
14+
Out1[2].xy = abs(In1[0].xy);
15+
16+
// uint16_t
17+
Out2[0] = abs(In2[0]);
18+
uint16_t4 Tmp2 = {abs(In2[0].xyz), abs(In2[0].w)};
19+
Out2[1] = Tmp2;
20+
Out2[2].xy = abs(In2[0].xy);
21+
}
22+
23+
//--- pipeline.yaml
24+
25+
---
26+
Shaders:
27+
- Stage: Compute
28+
Entry: main
29+
DispatchSize: [1, 1, 1]
30+
Buffers:
31+
- Name: In1
32+
Format: Int16
33+
Stride: 8
34+
Data: [-1, 0, -32768, 32767]
35+
- Name: In2
36+
Format: UInt16
37+
Stride: 8
38+
Data: [1, 65535, 0, 10]
39+
- Name: Out1
40+
Format: Int16
41+
Stride: 8
42+
ZeroInitSize: 24
43+
- Name: ExpectedOut1 # The result we expect
44+
Format: Int16
45+
Stride: 8
46+
Data: [1, 0, -32768, 32767, 1, 0, -32768, 32767, 1, 0, 0, 0] # Last two are filler
47+
- Name: Out2
48+
Format: UInt16
49+
Stride: 8
50+
ZeroInitSize: 24
51+
- Name: ExpectedOut2 # The result we expect
52+
Format: UInt16
53+
Stride: 8
54+
Data: [1, 65535, 0, 10, 1, 65535, 0, 10, 1, 65535, 0, 0] # Last two are filler
55+
Results:
56+
- Result: Test1
57+
Rule: BufferExact
58+
Actual: Out1
59+
Expected: ExpectedOut1
60+
- Result: Test2
61+
Rule: BufferExact
62+
Actual: Out2
63+
Expected: ExpectedOut2
64+
DescriptorSets:
65+
- Resources:
66+
- Name: In1
67+
Kind: StructuredBuffer
68+
DirectXBinding:
69+
Register: 0
70+
Space: 0
71+
VulkanBinding:
72+
Binding: 0
73+
- Name: In2
74+
Kind: StructuredBuffer
75+
DirectXBinding:
76+
Register: 1
77+
Space: 0
78+
VulkanBinding:
79+
Binding: 1
80+
- Name: Out1
81+
Kind: RWStructuredBuffer
82+
DirectXBinding:
83+
Register: 2
84+
Space: 0
85+
VulkanBinding:
86+
Binding: 2
87+
- Name: Out2
88+
Kind: RWStructuredBuffer
89+
DirectXBinding:
90+
Register: 3
91+
Space: 0
92+
VulkanBinding:
93+
Binding: 3
94+
...
95+
#--- end
96+
97+
# https://github.com/microsoft/DirectXShaderCompiler/issues/7512
98+
# XFAIL: DXC-Vulkan
99+
100+
# REQUIRES: Int16
101+
# RUN: split-file %s %t
102+
# RUN: %dxc_target -enable-16bit-types -T cs_6_5 -Fo %t.o %t/source.hlsl
103+
# RUN: %offloader %t/pipeline.yaml %t.o

0 commit comments

Comments
 (0)