Tune JTAG clock cycle

Current implementation doesn't need delay, because code it self need
1 micro second per TCK cycle. This gives 1 MHz so it is correct for
targets with 6 MHz CPU clocks and faster.

This patch add special delay routine when TCKWAIT is 0. If TCKWAIT is
non zero it is interpreted as delay in microseconds. This way it is easy
to set longer TCK cycle if needed.

Author: Chimstaz

Inc/jtag/jtag_low_level.h

@@ -3,7 +3,9 @@
 
 #include "stm32f4xx_it.h"
 
-#define TCKWAIT 10
+// if TCKWAIT == 0 than alternate method of delay is used.
+// if TCKWAIT > 0 than it represent half of TCK cycle in micro seconds
+#define TCKWAIT 0
 #define SIZEOF_IN_BITS(x) (sizeof(x) * 8)
 
 // maximum size of transfer in jtag_tdin function

Src/jtag/jtag_low_level.c

@@ -5,7 +5,10 @@
 #include "jtag/jtag_low_level.h"
 
 uint32_t getUs(void) {
-  uint32_t usTicks = HAL_RCC_GetSysClockFreq() / 1000000;
+  static uint32_t usTicks = 0;
+  if (usTicks == 0) {
+    usTicks = HAL_RCC_GetSysClockFreq() / 1000000;
+  }
   register uint32_t ms, cycle_cnt;
   do {
     ms = HAL_GetTick();
@@ -23,15 +26,38 @@ void delayUs(uint16_t micros)
   }
 }
 
+#if TCKWAIT == 0
+// current implementation of JTAG low level routines allow us to get ~1MHz if there
+// is no additional delay.
+static inline void short_delay(){
+  asm("nop");
+  asm("nop");
+  asm("nop");
+  asm("nop");
+  asm("nop");
+  asm("nop");
+  asm("nop");
+  asm("nop");
+}
+#endif
+
 void jtag_tclk_up()
 {
+#if TCKWAIT == 0
+  short_delay();
+#else
   delayUs(TCKWAIT);
+#endif
   HAL_GPIO_WritePin(JTAG_TCLK_GPIO_Port, JTAG_TCLK_Pin, GPIO_PIN_SET);
 }
 
 void jtag_tclk_down()
 {
+#if TCKWAIT == 0
+  short_delay();
+#else
   delayUs(TCKWAIT);
+#endif
   HAL_GPIO_WritePin(JTAG_TCLK_GPIO_Port, JTAG_TCLK_Pin, GPIO_PIN_RESET);
 }