Support >16MB SPI chips (fast_SPI support)

[tlaurion]

@miczyg1 is the whole 32MB mapped into memory or just the top 16MB?

Just the top 16MB of the BIOS region.

Having looked at some cbmem logs it looks like FLASH with size 0x2000000 is mapped @ 0xfe000000.

IIRC flashrom prints that, but it is actually bogus info. The MMIO area 0xfe000000 - 0xff000000 has a lot of chipset-specific MMIO (LAPIC, IOAPIC, TXT, TPM and a lot more), so flash can't be mapped there.

The remaining part of the flash is mapped at a separate base address configured in the SPI controller. See details here: https://github.com/coreboot/coreboot/blob/main/src/soc/intel/common/block/fast_spi/mmap_boot.c
(the EXT_BIOS_WIN). Here is base address the programming to the SPI controller PCI space: https://github.com/coreboot/coreboot/blob/main/src/soc/intel/common/block/fast_spi/fast_spi.c#L361

So the cbfs utility would have to look at this PCI register in SPI controllers that support this feature.

Originally posted by @miczyg1 in linuxboot/heads#1995 (comment)