@@ -37,24 +37,40 @@ may only be done between VMs using the same solution.
3737ivshmem hv:
3838 The **ivshmem hv ** implements register virtualization
3939 and shared memory mapping in the ACRN hypervisor.
40- It will support notification /interrupt mechanism in the future .
40+ Notification /interrupt mechanism is supported .
4141
4242ivshmem dm:
4343 The **ivshmem dm ** implements register virtualization
4444 and shared memory mapping in the ACRN Device Model (``acrn-dm ``).
4545 It will support notification/interrupt mechanism in the future.
4646
4747ivshmem server:
48- A daemon for inter-VM notification capability that will work with **ivshmem
49- dm **. This is currently **not implemented **, so the inter-VM communication
50- doesn't support a notification mechanism.
48+ With **ivshmem server ** support, VMs with ivshmem devices enabled can send
49+ notification (interrupt) to each other by writing the target peer ID (VM ID)
50+ and vector index to the doorbell register of ivshmem device, **ivshmem server **
51+ forwards this notification event to target VM.
52+
53+ Two types of **ivshmem server ** are defined in ACRN:
54+
55+ User land **ivshmem server ** is a daemon in user space to forward notifications
56+ for **dm-land ** ivshmem devices only, by co-working with **ivshmem dm **.
57+ User land **ivshmem server ** is not implemented.
58+
59+ HV-land **ivshmem server ** plays similar role with user land **ivshmem server **,
60+ but it is a hypervisor module and forwards notification (virtual interrupt) to
61+ target VM with **hv-land ** ivshmem devices enabled.
5162
5263Ivshmem Device Introduction
5364***************************
5465
55- The ``ivshmem `` device is a virtual standard PCI device consisting of
56- two Base Address Registers (BARs): BAR0 is used for emulating interrupt
57- related registers, and BAR2 is used for exposing shared memory region. The ``ivshmem `` device doesn't support any extra capabilities.
66+ The ``ivshmem `` device is a virtual standard PCI device consisting of
67+ three Base Address Registers (BARs):
68+
69+ * BAR0 is used for emulating interrupt related registers,
70+ * BAR1 is used for emulating MSIX entry table, and
71+ * BAR2 is used for exposing a shared memory region.
72+
73+ The ``ivshmem `` device supports no extra capabilities.
5874
5975Configuration Space Definition
6076
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