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[EXIR] Register _clone_dim_order op and map aten.clone (#13735)
### Summary
This is PR 2 of 3 implementing a dim order aware clone op.
This PR registers the new `_clone_dim_order` op and maps `aten.clone` to
`dim_order_ops._clone_dim_order` in EXIR during export to preserve
memory layout changes (contiguous/channels_last). It also updates the
Core ML, ARM, and Qualcomm backends to handle the new clone op.
Related PRs:
- PR 1: [#12974](#12974) - Add
`_clone_dim_order` portable kernel
- PR 3: [#12976](#12976) -
Update RemoveCloneOpsTransform to be dim order aware
Fixes#12645
### Test plan
- Operator level tests to verify kernel behavior for layout preservation
and changes.
- Graph level checks to confirm that clone mapping occurs.
- End to end tests to validate that functional clone behavior is
unchanged.
- Backend tests to ensure clone semantics are preserved.
All tests pass via:
`python -m unittest exir.tests.test_memory_format_ops_pass`
`python -m unittest backends.apple.coreml.test.test_torch_ops`
`pytest backends/arm/test/ops/test_clone.py`
`pytest backends/arm/test/passes/test_remove_clone_pass.py`
---------
Co-authored-by: Gasoonjia <[email protected]>
Co-authored-by: Digant Desai <[email protected]>
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