Skip to content

Enable 1080p120 TMDS rates on sunxi dw-hdmi #487

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 1 commit into from
Closed

Enable 1080p120 TMDS rates on sunxi dw-hdmi #487

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
11 changes: 8 additions & 3 deletions drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,10 +31,15 @@ sun8i_dw_hdmi_encoder_helper_funcs = {

static enum drm_mode_status
sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data,
const struct drm_display_info *info,
const struct drm_display_mode *mode)
const struct drm_display_info *info,
const struct drm_display_mode *mode)
{
if (mode->clock > 297000)
/*
* The A83T controller can safely drive TMDS clocks beyond the old
* HDMI 1.4 limit. Allow up to 340 MHz so that 1080p120 (297 MHz) and
* similar high-refresh CEA/CTA modes are exposed to userspace.
*/
if (mode->clock > 340000)
return MODE_CLOCK_HIGH;

return MODE_OK;
Expand Down
6 changes: 6 additions & 0 deletions drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,12 @@ static const struct dw_hdmi_mpll_config sun50i_h6_mpll_cfg[] = {
{ 0x214c, 0x0003 },
{ 0x5a64, 0x0003 },
},
}, {
297000000, {
{ 0x0040, 0x0003 },
{ 0x214c, 0x0003 },
{ 0x5a64, 0x0003 },
},
}, {
340000000, {
{ 0x0040, 0x0003 },
Expand Down