Skip to content

Commit 9bf46e1

Browse files
committed
Fixed random clock period generation
1 parent ba97212 commit 9bf46e1

File tree

1 file changed

+12
-16
lines changed

1 file changed

+12
-16
lines changed

lambdalib/ramlib/tests/tb_la_asyncfifo.py

Lines changed: 12 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
import random
2+
import string
23
from decimal import Decimal
34

45
import siliconcompiler
@@ -7,7 +8,6 @@
78
from cocotb.clock import Clock
89
from cocotb.triggers import ClockCycles, Timer, Combine
910
from cocotb.regression import TestFactory
10-
from cocotb import utils
1111

1212
from lambdalib import ramlib
1313
from lambdalib.utils._tb_common import (
@@ -30,6 +30,12 @@ def bursty_en_gen(burst_len=20):
3030
yield en_state
3131

3232

33+
def random_decimal(max: int, min: int, decimal_places=2) -> Decimal:
34+
prefix = str(random.randint(min, max))
35+
suffix = ''.join(random.choice(string.digits) for _ in range(decimal_places))
36+
return Decimal(prefix + "." + suffix)
37+
38+
3339
@cocotb.test()
3440
async def test_almost_full(dut):
3541

@@ -115,7 +121,7 @@ async def fifo_rd_wr_test(
115121

116122
await cocotb.start(Clock(dut.wr_clk, wr_clk_period_ns, units="ns").start())
117123
# Randomize phase shift between clocks
118-
await Timer(wr_clk_period_ns * random.random(), "ns", round_mode="round")
124+
await Timer(wr_clk_period_ns * Decimal(random.random()), "ns", round_mode="round")
119125
await cocotb.start(Clock(dut.rd_clk, rd_clk_period_ns, units="ns").start())
120126

121127
await ClockCycles(dut.wr_clk, 3)
@@ -134,21 +140,11 @@ async def fifo_rd_wr_test(
134140

135141

136142
# Generate sets of tests based on the different permutations of the possible arguments to fifo_test
137-
MAX_PERIOD_NS = 10.0
138-
MIN_PERIOD_NS = 1.0
143+
MAX_PERIOD_NS = 10
144+
MIN_PERIOD_NS = 1
145+
139146
# Generate random clk period to test between min and max
140-
RAND_WR_CLK_PERIOD_NS, RAND_RD_CLK_PERIOD_NS = [utils.get_time_from_sim_steps(
141-
# Time step must be even for cocotb clock driver
142-
steps=utils.get_sim_steps(
143-
time=Decimal(MIN_PERIOD_NS) + (
144-
Decimal(MAX_PERIOD_NS - MIN_PERIOD_NS)
145-
* Decimal(random.random()).quantize(Decimal("0.00"))
146-
),
147-
units="ns",
148-
round_mode="round"
149-
) & ~1,
150-
units="ns"
151-
) for _ in range(0, 2)]
147+
RAND_WR_CLK_PERIOD_NS, RAND_RD_CLK_PERIOD_NS = [random_decimal(MAX_PERIOD_NS, MIN_PERIOD_NS) for _ in range(2)]
152148

153149
# Factory to automatically generate a set of tests based on the different permutations
154150
# of the provided test arguments

0 commit comments

Comments
 (0)