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fix(u3): generic U375V(E-G)IxQ and U385VGIxQ
Signed-off-by: Frederic Pillon <[email protected]>
1 parent d04df18 commit 6eacd37

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2 files changed

+17
-7
lines changed

2 files changed

+17
-7
lines changed

variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/generic_clock.c

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,12 @@ WEAK void SystemClock_Config(void)
2525
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
2626
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
2727

28+
/** Configure the System Power Supply
29+
*/
30+
if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK) {
31+
Error_Handler();
32+
}
33+
2834
/** Enable Epod Booster
2935
*/
3036
if (HAL_RCCEx_EpodBoosterClkConfig(RCC_EPODBOOSTER_SOURCE_MSIS, RCC_EPODBOOSTER_DIV1) != HAL_OK) {
@@ -46,20 +52,21 @@ WEAK void SystemClock_Config(void)
4652

4753
/** Initializes the CPU, AHB and APB buses clocks
4854
*/
49-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
50-
| RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSIS;
55+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI
56+
|RCC_OSCILLATORTYPE_MSIS;
5157
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
5258
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
53-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
5459
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
5560
RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1;
5661
RCC_OscInitStruct.MSISState = RCC_MSI_ON;
5762
RCC_OscInitStruct.MSISSource = RCC_MSI_RC0;
5863
RCC_OscInitStruct.MSISDiv = RCC_MSI_DIV1;
59-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
64+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
65+
{
6066
Error_Handler();
6167
}
6268

69+
6370
/** Initializes the CPU, AHB and APB buses clocks
6471
*/
6572
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
@@ -77,8 +84,8 @@ WEAK void SystemClock_Config(void)
7784

7885
/** Initializes the peripherals clock
7986
*/
80-
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_DAC1SH | RCC_PERIPHCLK_LPUART1
81-
| RCC_PERIPHCLK_USB1;
87+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_DAC1SH | RCC_PERIPHCLK_ICLK
88+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB1;
8289
PeriphClkInit.Dac1SampleHoldClockSelection = RCC_DAC1SHCLKSOURCE_LSI;
8390
PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
8491
PeriphClkInit.IclkClockSelection = RCC_ICLKCLKSOURCE_HSI48;

variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/ldscript.ld

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
**
66
** @author : Auto-generated by STM32CubeIDE
77
**
8-
** @brief : Linker script for STM32U385VGIx Device from STM32U3 series
8+
** @brief : Linker script for STM32U385VGIxQ Device from STM32U3 series
99
** 1024KBytes FLASH
1010
** 192KBytes RAM
1111
** 64KBytes RAM2
@@ -46,12 +46,15 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
4646
MEMORY
4747
{
4848
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
49+
/* RAM2 is contiguous to RAM, declare only one block */
50+
/* RAM2 (xrw) : ORIGIN = 0x20030000, LENGTH = 64K */
4951
FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
5052
}
5153

5254
/* Sections */
5355
SECTIONS
5456
{
57+
5558
/* The startup code into "FLASH" Rom type memory */
5659
.isr_vector :
5760
{

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