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Merge commit '5ff99f2757a6' from llvm.org/main into next
2 parents 52d9c29 + 5ff99f2 commit 74d45cd

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llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2864,7 +2864,7 @@ bool RISCVDAGToDAGISel::SelectAddrRegImm(SDValue Addr, SDValue &Base,
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if (CurDAG->isBaseWithConstantOffset(Addr)) {
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int64_t CVal = cast<ConstantSDNode>(Addr.getOperand(1))->getSExtValue();
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if (isInt<12>(CVal) && isInt<12>(CVal)) {
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if (isInt<12>(CVal)) {
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Base = Addr.getOperand(0);
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if (Base.getOpcode() == RISCVISD::ADD_LO) {
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SDValue LoOperand = Base.getOperand(1);

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