@@ -45,18 +45,6 @@ namespace xsimd
4545 class x86_xcr0
4646 {
4747 public:
48- using reg_t = detail::xcr0_reg_t ;
49-
50- static constexpr reg_t sse_bit = 1 ;
51- static constexpr reg_t avx_bit = 2 ;
52- static constexpr reg_t avx512_bit = 6 ;
53-
54- /* * Parse a XCR0 value into individual components. */
55- constexpr explicit x86_xcr0 (reg_t low) noexcept
56- : m_low(low)
57- {
58- }
59-
6048 /* *
6149 * Create a default value with only SSE enabled.
6250 *
@@ -78,6 +66,9 @@ namespace xsimd
7866 return x86_xcr0 (detail::get_xcr0_low ());
7967 }
8068
69+ /* * Create a value which return false to everything. */
70+ constexpr x86_xcr0 () noexcept = default;
71+
8172 constexpr bool sse_enabled () const noexcept
8273 {
8374 return utils::bit_is_set<sse_bit>(m_low);
@@ -97,6 +88,17 @@ namespace xsimd
9788 }
9889
9990 private:
91+ using reg_t = detail::xcr0_reg_t ;
92+
93+ static constexpr reg_t sse_bit = 1 ;
94+ static constexpr reg_t avx_bit = 2 ;
95+ static constexpr reg_t avx512_bit = 6 ;
96+
97+ /* * Parse a XCR0 value into individual components. */
98+ constexpr explicit x86_xcr0 (reg_t low) noexcept
99+ : m_low(low)
100+ {
101+ }
100102 reg_t m_low = {};
101103 };
102104
@@ -112,22 +114,6 @@ namespace xsimd
112114 class x86_cpu_id
113115 {
114116 public:
115- struct cpu_id_regs
116- {
117- using reg_t = detail::cpuid_reg_t ;
118-
119- reg_t reg1 = {};
120- reg_t reg7 = {};
121- reg_t reg7a = {};
122- reg_t reg8 = {};
123- };
124-
125- /* * Parse CpuInfo register values into individual components. */
126- constexpr explicit x86_cpu_id (const cpu_id_regs& regs) noexcept
127- : m_regs(regs)
128- {
129- }
130-
131117 /* *
132118 * Read the CpuId registers from the CPU if on the correct architecture.
133119 *
@@ -146,6 +132,9 @@ namespace xsimd
146132 return x86_cpu_id (regs);
147133 }
148134
135+ /* * Create a value which return false to everything. */
136+ constexpr x86_cpu_id () noexcept = default;
137+
149138 constexpr bool sse2 () const noexcept { return utils::bit_is_set<26 >(m_regs.reg1 [3 ]); }
150139
151140 constexpr bool sse3 () const noexcept { return utils::bit_is_set<0 >(m_regs.reg1 [2 ]); }
@@ -199,6 +188,21 @@ namespace xsimd
199188 constexpr bool fma4 () const noexcept { return utils::bit_is_set<16 >(m_regs.reg8 [2 ]); }
200189
201190 private:
191+ struct cpu_id_regs
192+ {
193+ using reg_t = detail::cpuid_reg_t ;
194+
195+ reg_t reg1 = {};
196+ reg_t reg7 = {};
197+ reg_t reg7a = {};
198+ reg_t reg8 = {};
199+ };
200+
201+ /* * Parse CpuInfo register values into individual components. */
202+ constexpr explicit x86_cpu_id (const cpu_id_regs& regs) noexcept
203+ : m_regs(regs)
204+ {
205+ }
202206 cpu_id_regs m_regs = {};
203207 };
204208
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