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| 1 | +# SPDX-License-Identifier: BSD-3-Clause |
| 2 | +# Copyright (C) 2025 CESNET z. s. p. o. |
| 3 | +# Author(s): Ondrej Schwarz <[email protected]> |
| 4 | + |
| 5 | +SETTINGS = { |
| 6 | + "default" : { # The default setting of verification |
| 7 | + "DATA_WIDTH" : "1", |
| 8 | + "WRITE_PORTS" : "1", |
| 9 | + "READ_PORTS" : "1", |
| 10 | + "BLOCK_ENABLE" : "False", |
| 11 | + "BLOCK_WIDTH" : "8" |
| 12 | + }, |
| 13 | + "aligned_data_width1": { |
| 14 | + "DATA_WIDTH": "8", |
| 15 | + }, |
| 16 | + "aligned_data_width2": { |
| 17 | + "DATA_WIDTH": "16", |
| 18 | + }, |
| 19 | + "aligned_data_width3": { |
| 20 | + "DATA_WIDTH": "32", |
| 21 | + }, |
| 22 | + "unaligned_data_width1": { |
| 23 | + "DATA_WIDTH": "9", |
| 24 | + }, |
| 25 | + "unaligned_data_width2": { |
| 26 | + "DATA_WIDTH": "18", |
| 27 | + }, |
| 28 | + "unaligned_data_width3": { |
| 29 | + "DATA_WIDTH": "27", |
| 30 | + }, |
| 31 | + "multiple_read_ports1": { |
| 32 | + "READ_PORTS": "2", |
| 33 | + }, |
| 34 | + "multiple_read_ports2": { |
| 35 | + "READ_PORTS": "4", |
| 36 | + }, |
| 37 | + "multiple_write_ports1": { |
| 38 | + "WRITE_PORTS": "2", |
| 39 | + }, |
| 40 | + "multiple_write_ports2": { |
| 41 | + "WRITE_PORTS": "4", |
| 42 | + }, |
| 43 | + "block_enable_8b_blocks": { |
| 44 | + "BLOCK_ENABLE" : "True", |
| 45 | + "BLOCK_WIDTH" : "8" |
| 46 | + }, |
| 47 | + "block_enable_9b_blocks": { |
| 48 | + "BLOCK_ENABLE" : "True", |
| 49 | + "BLOCK_WIDTH" : "9" |
| 50 | + }, |
| 51 | + "_combinations_" : ( |
| 52 | + (), # Works the same as '("default",),' as the "default" is applied in every combination |
| 53 | + ("aligned_data_width1"), |
| 54 | + ("aligned_data_width2"), |
| 55 | + ("aligned_data_width3"), |
| 56 | + ("unaligned_data_width1"), |
| 57 | + ("unaligned_data_width2"), |
| 58 | + ("unaligned_data_width3"), |
| 59 | + ("multiple_read_ports1"), |
| 60 | + ("multiple_read_ports2"), |
| 61 | + ("multiple_write_ports1"), |
| 62 | + ("multiple_write_ports2"), |
| 63 | + ("aligned_data_width1", "block_enable_8b_blocks"), |
| 64 | + ("aligned_data_width2", "block_enable_8b_blocks"), |
| 65 | + ("aligned_data_width3", "block_enable_8b_blocks"), |
| 66 | + ("unaligned_data_width1", "block_enable_9b_blocks"), |
| 67 | + ("unaligned_data_width2", "block_enable_9b_blocks"), |
| 68 | + ("unaligned_data_width3", "block_enable_9b_blocks"), |
| 69 | + |
| 70 | + ("aligned_data_width1","multiple_read_ports1"), |
| 71 | + ("aligned_data_width1","multiple_read_ports2"), |
| 72 | + ("aligned_data_width1","multiple_write_ports1"), |
| 73 | + ("aligned_data_width1","multiple_write_ports2"), |
| 74 | + ("aligned_data_width1","multiple_read_ports1", "block_enable_8b_blocks"), |
| 75 | + ("aligned_data_width1","multiple_read_ports2", "block_enable_8b_blocks"), |
| 76 | + ("aligned_data_width1","multiple_write_ports1", "block_enable_8b_blocks"), |
| 77 | + ("aligned_data_width1","multiple_write_ports2", "block_enable_8b_blocks"), |
| 78 | + ("aligned_data_width1","multiple_read_ports1", "multiple_write_ports1"), |
| 79 | + ("aligned_data_width1","multiple_read_ports2", "multiple_write_ports2"), |
| 80 | + ("aligned_data_width1","multiple_read_ports2", "multiple_write_ports1"), |
| 81 | + ("aligned_data_width1","multiple_read_ports1", "multiple_write_ports2"), |
| 82 | + ("aligned_data_width1","multiple_read_ports1", "multiple_write_ports1", "block_enable_8b_blocks"), |
| 83 | + ("aligned_data_width1","multiple_read_ports2", "multiple_write_ports2", "block_enable_8b_blocks"), |
| 84 | + ("aligned_data_width1","multiple_read_ports2", "multiple_write_ports1", "block_enable_8b_blocks"), |
| 85 | + ("aligned_data_width1","multiple_read_ports1", "multiple_write_ports2", "block_enable_8b_blocks"), |
| 86 | + |
| 87 | + ("aligned_data_width2","multiple_read_ports1"), |
| 88 | + ("aligned_data_width2","multiple_read_ports2"), |
| 89 | + ("aligned_data_width2","multiple_write_ports1"), |
| 90 | + ("aligned_data_width2","multiple_write_ports2"), |
| 91 | + ("aligned_data_width2","multiple_read_ports1", "block_enable_8b_blocks"), |
| 92 | + ("aligned_data_width2","multiple_read_ports2", "block_enable_8b_blocks"), |
| 93 | + ("aligned_data_width2","multiple_write_ports1", "block_enable_8b_blocks"), |
| 94 | + ("aligned_data_width2","multiple_write_ports2", "block_enable_8b_blocks"), |
| 95 | + ("aligned_data_width2","multiple_read_ports1", "multiple_write_ports1"), |
| 96 | + ("aligned_data_width2","multiple_read_ports2", "multiple_write_ports2"), |
| 97 | + ("aligned_data_width2","multiple_read_ports2", "multiple_write_ports1"), |
| 98 | + ("aligned_data_width2","multiple_read_ports1", "multiple_write_ports2"), |
| 99 | + ("aligned_data_width2","multiple_read_ports1", "multiple_write_ports1", "block_enable_8b_blocks"), |
| 100 | + ("aligned_data_width2","multiple_read_ports2", "multiple_write_ports2", "block_enable_8b_blocks"), |
| 101 | + ("aligned_data_width2","multiple_read_ports2", "multiple_write_ports1", "block_enable_8b_blocks"), |
| 102 | + ("aligned_data_width2","multiple_read_ports1", "multiple_write_ports2", "block_enable_8b_blocks"), |
| 103 | + |
| 104 | + ("aligned_data_width3","multiple_read_ports1"), |
| 105 | + ("aligned_data_width3","multiple_read_ports2"), |
| 106 | + ("aligned_data_width3","multiple_write_ports1"), |
| 107 | + ("aligned_data_width3","multiple_write_ports2"), |
| 108 | + ("aligned_data_width3","multiple_read_ports1", "block_enable_8b_blocks"), |
| 109 | + ("aligned_data_width3","multiple_read_ports2", "block_enable_8b_blocks"), |
| 110 | + ("aligned_data_width3","multiple_write_ports1", "block_enable_8b_blocks"), |
| 111 | + ("aligned_data_width3","multiple_write_ports2", "block_enable_8b_blocks"), |
| 112 | + ("aligned_data_width3","multiple_read_ports1", "multiple_write_ports1"), |
| 113 | + ("aligned_data_width3","multiple_read_ports2", "multiple_write_ports2"), |
| 114 | + ("aligned_data_width3","multiple_read_ports2", "multiple_write_ports1"), |
| 115 | + ("aligned_data_width3","multiple_read_ports1", "multiple_write_ports2"), |
| 116 | + ("aligned_data_width3","multiple_read_ports1", "multiple_write_ports1", "block_enable_8b_blocks"), |
| 117 | + ("aligned_data_width3","multiple_read_ports2", "multiple_write_ports2", "block_enable_8b_blocks"), |
| 118 | + ("aligned_data_width3","multiple_read_ports2", "multiple_write_ports1", "block_enable_8b_blocks"), |
| 119 | + ("aligned_data_width3","multiple_read_ports1", "multiple_write_ports2", "block_enable_8b_blocks"), |
| 120 | + |
| 121 | + ("unaligned_data_width1","multiple_read_ports1"), |
| 122 | + ("unaligned_data_width1","multiple_read_ports2"), |
| 123 | + ("unaligned_data_width1","multiple_write_ports1"), |
| 124 | + ("unaligned_data_width1","multiple_write_ports2"), |
| 125 | + ("unaligned_data_width1","multiple_read_ports1", "block_enable_9b_blocks"), |
| 126 | + ("unaligned_data_width1","multiple_read_ports2", "block_enable_9b_blocks"), |
| 127 | + ("unaligned_data_width1","multiple_write_ports1", "block_enable_9b_blocks"), |
| 128 | + ("unaligned_data_width1","multiple_write_ports2", "block_enable_9b_blocks"), |
| 129 | + ("unaligned_data_width1","multiple_read_ports1", "multiple_write_ports1"), |
| 130 | + ("unaligned_data_width1","multiple_read_ports2", "multiple_write_ports2"), |
| 131 | + ("unaligned_data_width1","multiple_read_ports2", "multiple_write_ports1"), |
| 132 | + ("unaligned_data_width1","multiple_read_ports1", "multiple_write_ports2"), |
| 133 | + ("unaligned_data_width1","multiple_read_ports1", "multiple_write_ports1", "block_enable_9b_blocks"), |
| 134 | + ("unaligned_data_width1","multiple_read_ports2", "multiple_write_ports2", "block_enable_9b_blocks"), |
| 135 | + ("unaligned_data_width1","multiple_read_ports2", "multiple_write_ports1", "block_enable_9b_blocks"), |
| 136 | + ("unaligned_data_width1","multiple_read_ports1", "multiple_write_ports2", "block_enable_9b_blocks"), |
| 137 | + |
| 138 | + ("unaligned_data_width2","multiple_read_ports1"), |
| 139 | + ("unaligned_data_width2","multiple_read_ports2"), |
| 140 | + ("unaligned_data_width2","multiple_write_ports1"), |
| 141 | + ("unaligned_data_width2","multiple_write_ports2"), |
| 142 | + ("unaligned_data_width2","multiple_read_ports1", "block_enable_9b_blocks"), |
| 143 | + ("unaligned_data_width2","multiple_read_ports2", "block_enable_9b_blocks"), |
| 144 | + ("unaligned_data_width2","multiple_write_ports1", "block_enable_9b_blocks"), |
| 145 | + ("unaligned_data_width2","multiple_write_ports2", "block_enable_9b_blocks"), |
| 146 | + ("unaligned_data_width2","multiple_read_ports1", "multiple_write_ports1"), |
| 147 | + ("unaligned_data_width2","multiple_read_ports2", "multiple_write_ports2"), |
| 148 | + ("unaligned_data_width2","multiple_read_ports2", "multiple_write_ports1"), |
| 149 | + ("unaligned_data_width2","multiple_read_ports1", "multiple_write_ports2"), |
| 150 | + ("unaligned_data_width2","multiple_read_ports1", "multiple_write_ports1", "block_enable_9b_blocks"), |
| 151 | + ("unaligned_data_width2","multiple_read_ports2", "multiple_write_ports2", "block_enable_9b_blocks"), |
| 152 | + ("unaligned_data_width2","multiple_read_ports2", "multiple_write_ports1", "block_enable_9b_blocks"), |
| 153 | + ("unaligned_data_width2","multiple_read_ports1", "multiple_write_ports2", "block_enable_9b_blocks"), |
| 154 | + |
| 155 | + ("unaligned_data_width3","multiple_read_ports1"), |
| 156 | + ("unaligned_data_width3","multiple_read_ports2"), |
| 157 | + ("unaligned_data_width3","multiple_write_ports1"), |
| 158 | + ("unaligned_data_width3","multiple_write_ports2"), |
| 159 | + ("unaligned_data_width3","multiple_read_ports1", "block_enable_9b_blocks"), |
| 160 | + ("unaligned_data_width3","multiple_read_ports2", "block_enable_9b_blocks"), |
| 161 | + ("unaligned_data_width3","multiple_write_ports1", "block_enable_9b_blocks"), |
| 162 | + ("unaligned_data_width3","multiple_write_ports2", "block_enable_9b_blocks"), |
| 163 | + ("unaligned_data_width3","multiple_read_ports1", "multiple_write_ports1"), |
| 164 | + ("unaligned_data_width3","multiple_read_ports2", "multiple_write_ports2"), |
| 165 | + ("unaligned_data_width3","multiple_read_ports2", "multiple_write_ports1"), |
| 166 | + ("unaligned_data_width3","multiple_read_ports1", "multiple_write_ports2"), |
| 167 | + ("unaligned_data_width3","multiple_read_ports1", "multiple_write_ports1", "block_enable_9b_blocks"), |
| 168 | + ("unaligned_data_width3","multiple_read_ports2", "multiple_write_ports2", "block_enable_9b_blocks"), |
| 169 | + ("unaligned_data_width3","multiple_read_ports2", "multiple_write_ports1", "block_enable_9b_blocks"), |
| 170 | + ("unaligned_data_width3","multiple_read_ports1", "multiple_write_ports2", "block_enable_9b_blocks"), |
| 171 | + ), |
| 172 | +} |
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