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Sync with final ch21
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seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/AddARM.java

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ public class AddARM extends MachConcreteNode implements MachNode {
88
AddARM( Node add) { super(add); }
99
@Override public String op() { return "add"; }
1010
@Override public RegMask regmap(int i) { return arm.RMASK; }
11-
@Override public RegMask outregmap() { return arm.RMASK; }
11+
@Override public RegMask outregmap() { return arm.WMASK; }
1212

1313
// ADD (shifted register)
1414
@Override public void encoding( Encoding enc ) { arm.r_reg(enc,this,arm.OP_ADD); }

seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/AddFARM.java

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ public class AddFARM extends MachConcreteNode implements MachNode {
1111
@Override public RegMask outregmap() { return arm.DMASK; }
1212

1313
//FADD (scalar)
14-
@Override public void encoding( Encoding enc ) { arm.f_scalar(enc,this,arm.OPF_ADD); }
14+
@Override public void encoding( Encoding enc ) { arm.f_scalar(enc,this,arm.OPF_OP_ADD);}
1515

1616
// Default on double precision for now(64 bits)
1717
// General form: "addf rd = src1 + src2

seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/AddIARM.java

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ public class AddIARM extends MachConcreteNode implements MachNode {
1515
return _imm == 1 ? "inc" : (_imm == -1 ? "dec" : "addi");
1616
}
1717
@Override public RegMask regmap(int i) { return arm.RMASK; }
18-
@Override public RegMask outregmap() { return arm.RMASK; }
18+
@Override public RegMask outregmap() { return arm.WMASK; }
1919
//ADD (immediate)
2020
@Override public void encoding( Encoding enc ) {
2121
arm.imm_inst(enc,this, in(1), arm.OPI_ADD,_imm);

seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/AndARM.java

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ public class AndARM extends MachConcreteNode implements MachNode {
1111
@Override public String op() { return "and"; }
1212
@Override public String glabel() { return "&"; }
1313
@Override public RegMask regmap(int i) { return arm.RMASK; }
14-
@Override public RegMask outregmap() { return arm.RMASK; }
14+
@Override public RegMask outregmap() { return arm.WMASK; }
1515
// AND (shifted register)
1616
@Override public void encoding( Encoding enc ) { arm.r_reg(enc,this,arm.OP_AND); }
1717
// General form: #rd = rs1 & rs2

seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/AndIARM.java

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,12 @@ public class AndIARM extends MachConcreteNode implements MachNode {
1313
}
1414
@Override public String op() { return "andi"; }
1515
@Override public RegMask regmap(int i) { return arm.RMASK; }
16-
@Override public RegMask outregmap() { return arm.RMASK; }
16+
@Override public RegMask outregmap() { return arm.WMASK; }
1717
@Override public void encoding( Encoding enc ) {
1818
arm.imm_inst_n(enc,this, in(1), arm.OPI_AND,_imm);
1919
}
2020
// General form: "andi rd = rs1 & imm"
2121
@Override public void asm(CodeGen code, SB sb) {
22-
sb.p(code.reg(this)).p(" = ").p(code.reg(in(1))).p(" & #").p(_imm);
22+
sb.p(code.reg(this)).p(" = ").p(code.reg(in(1))).p(" & #").p(arm.decodeImm12(_imm));
2323
}
2424
}

seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/AsrARM.java

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ public class AsrARM extends MachConcreteNode implements MachNode {
99
AsrARM(Node asr) {super(asr);}
1010
@Override public String op() { return "sar"; }
1111
@Override public RegMask regmap(int i) { return arm.RMASK; }
12-
@Override public RegMask outregmap() { return arm.RMASK; }
12+
@Override public RegMask outregmap() { return arm.DMASK; }
1313
@Override public void encoding( Encoding enc ) { arm.shift_reg(enc,this,arm.OP_ASR); }
1414
@Override public void asm(CodeGen code, SB sb) {
1515
sb.p(code.reg(this)).p(" = ").p(code.reg(in(1))).p(" >> ").p(code.reg(in(2)));

seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/AsrIARM.java

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ public class AsrIARM extends MachConcreteNode implements MachNode {
1717
}
1818
@Override public String op() { return "asri"; }
1919
@Override public RegMask regmap(int i) { return arm.RMASK; }
20-
@Override public RegMask outregmap() { return arm.RMASK; }
20+
@Override public RegMask outregmap() { return arm.WMASK; }
2121
@Override public void encoding( Encoding enc ) {
2222
short rd = enc.reg(this);
2323
short rn = enc.reg(in(1));

seaofnodes/src/main/java/com/compilerprogramming/ezlang/compiler/nodes/cpus/arm/BranchARM.java

Lines changed: 18 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ public class BranchARM extends IfNode implements MachNode, RIPRelSize {
1616

1717
@Override public void postSelect(CodeGen code) {
1818
Node set = in(1);
19+
if( set==null ) return; // Never-node cutout
1920
Node cmp = set.in(1);
2021
// Bypass an expected Set and just reference the cmp directly
2122
if( set instanceof SetARM)
@@ -26,25 +27,32 @@ public class BranchARM extends IfNode implements MachNode, RIPRelSize {
2627

2728
@Override public RegMask regmap(int i) { assert i==1; return arm.FLAGS_MASK; }
2829
@Override public RegMask outregmap() { return null; }
29-
@Override public void invert() { _bop = invert(_bop); }
30+
@Override public void negate() { _bop = negate(_bop); }
3031

3132
@Override public void encoding( Encoding enc ) {
3233
// Assuming that condition flags are already set. These flags are set
3334
// by comparison (or sub). No need for regs because it uses flags
35+
if( in(1)!=null ) {
36+
// B.cond
37+
enc.add4( arm.b_cond(arm.OP_BRANCH, 0, arm.make_condition(_bop)) );
38+
} else {
39+
if( _bop=="!=" ) return; // Inverted, no code
40+
enc.add4(arm.b(arm.OP_UJMP, 0));
41+
}
3442
enc.jump(this,cproj(0));
35-
// B.cond
36-
enc.add4( arm.b_cond(arm.OP_BRANCH, 0, arm.make_condition(_bop)) );
3743
}
3844

3945
// Delta is from opcode start
4046
@Override public byte encSize(int delta) {
47+
if( in(1)==null && _bop=="!=" ) return 0; // Inverted never-node, no code
4148
if( -(1<<19) <= delta && delta < (1<<19) ) return 4;
4249
// 2 word encoding needs a tmp register, must teach RA
4350
throw Utils.TODO();
4451
}
4552

4653
// Delta is from opcode start
4754
@Override public void patch( Encoding enc, int opStart, int opLen, int delta ) {
55+
assert !( in(1)==null && _bop=="!=" ); // Inverted never-node, no code no patch
4856
if( opLen==4 ) {
4957
enc.patch4(opStart,arm.b_cond(arm.OP_BRANCH, delta, arm.make_condition(_bop)));
5058
} else {
@@ -53,8 +61,13 @@ public class BranchARM extends IfNode implements MachNode, RIPRelSize {
5361
}
5462

5563
@Override public void asm(CodeGen code, SB sb) {
56-
String src = code.reg(in(1));
57-
if( src!="flags" ) sb.p(src).p(" ");
64+
if( in(1)!=null ) { // Never-node
65+
String src = code.reg(in(1));
66+
if( src!="flags" ) sb.p(src).p(" ");
67+
} else if( _bop=="!=" ) {
68+
sb.p("never");
69+
return;
70+
}
5871
CFGNode prj = cproj(0).uctrlSkipEmpty();
5972
if( !prj.blockHead() ) prj = prj.cfg0();
6073
sb.p(label(prj));
Lines changed: 1 addition & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,24 +1,8 @@
11
package com.compilerprogramming.ezlang.compiler.nodes.cpus.arm;
22

3-
import com.compilerprogramming.ezlang.compiler.SB;
4-
import com.compilerprogramming.ezlang.compiler.codegen.*;
53
import com.compilerprogramming.ezlang.compiler.nodes.CallEndNode;
64
import com.compilerprogramming.ezlang.compiler.nodes.MachNode;
7-
import com.compilerprogramming.ezlang.compiler.sontypes.SONTypeFunPtr;
85

96
public class CallEndARM extends CallEndNode implements MachNode {
10-
final SONTypeFunPtr _tfp;
11-
CallEndARM( CallEndNode cend ) {
12-
super(cend);
13-
_tfp = (SONTypeFunPtr)(cend.call().fptr()._type);
14-
}
15-
16-
@Override public String op() { return "cend"; }
17-
@Override public String label() { return op(); }
18-
@Override public RegMask regmap(int i) { return null; }
19-
@Override public RegMask outregmap() { return null; }
20-
@Override public RegMask outregmap(int idx) { return idx == 2 ? arm.retMask(_tfp,2) : null; }
21-
@Override public RegMask killmap() { return arm.armCallerSave(); }
22-
@Override public void encoding( Encoding enc ) { }
23-
@Override public void asm(CodeGen code, SB sb) { }
7+
CallEndARM( CallEndNode cend ) { super(cend); }
248
}
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
package com.compilerprogramming.ezlang.compiler.nodes.cpus.arm;
2+
3+
import com.compilerprogramming.ezlang.compiler.SB;
4+
import com.compilerprogramming.ezlang.compiler.codegen.CodeGen;
5+
import com.compilerprogramming.ezlang.compiler.codegen.Encoding;
6+
import com.compilerprogramming.ezlang.compiler.codegen.RegMask;
7+
import com.compilerprogramming.ezlang.compiler.nodes.CastNode;
8+
import com.compilerprogramming.ezlang.compiler.nodes.MachNode;
9+
10+
public class CastARM extends CastNode implements MachNode {
11+
public CastARM( CastNode cast ) { super(cast); }
12+
@Override public String op() { return label(); }
13+
@Override public RegMask regmap(int i) { assert i==1; return RegMask.FULL; }
14+
@Override public RegMask outregmap() { return RegMask.FULL; }
15+
@Override public int twoAddress( ) { return 1; }
16+
@Override public void encoding( Encoding enc ) { }
17+
@Override public void asm(CodeGen code, SB sb) { _t.print(sb.p(code.reg(in(1))).p(" isa ")); }
18+
}

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