soooo much improvements that cannot be listed out.

Author: pradosh-arduino

readme.md

@@ -53,14 +53,11 @@ Welcome to FrostWing, a lightweight and flexible operating system designed for x
 - GDT
     - BIOS
     - UEFI
-- Hardware abstraction layer
+- TSS
+- Hardware abstraction layer (HAL)
 - Memory
     - Heap memory allocator
-        - malloc
-        - free
     - Paging
-        - allocate pages
-        - free pages
 - PCI
     - Probing
     - Initializing required drivers
@@ -86,6 +83,8 @@ Welcome to FrostWing, a lightweight and flexible operating system designed for x
 - Audio
     - PC Speaker
 
+**AND MUCH MORE...**
+
 ### Getting started
 [*Please refer wiki for steps for compiling**](https://github.com/Frost-Wing/osdev/wiki)
 
@@ -136,9 +135,8 @@ We welcome contributions to FrostWing! If you'd like to contribute code, report
 FrostWing is open-source software released under the [CC0-1.0 License](https://github.com/Frost-Wing/osdev/blob/main/LICENSE). Feel free to use, modify, and distribute it as per the terms of this license.
 
 ## FrostWing Team
-- Owner and founder - Pradosh ([@PradoshGame](https://twitter.com/@PradoshGame))
+- Owner, founder & "The Dev" - Pradosh ([@PradoshGame](https://twitter.com/@PradoshGame))
 - OpenGL & Head Developer - GAMINGNOOB ([@GAMINGNOOBdev](https://github.com/GAMINGNOOBdev))
-- Secondary Head Developer - Lucas ([@lucas-hooghof](https://github.com/lucas-hooghof))
 - Sources
     - [Flanterm](https://github.com/mintsuki/flanterm/tree/trunk) from Mintsuki
     - [ACPI and Shutdown](https://github.com/mintsuki/acpi-shutdown-hack) from Mintsuki

source/Makefile

@@ -1,6 +1,6 @@
-# ============================
+# ===================================
 # FrostWing OS Makefile (x86_64 only)
-# ============================
+# ===================================
 
 # Nuke built-in rules and variables
 override MAKEFLAGS += -rR
@@ -19,7 +19,7 @@ OBJ_DIR := obj
 
 # Flags
 CFLAGS := -std=gnu11 -ffreestanding -fno-stack-protector -fno-stack-check -fno-lto \
-          -fPIE -Wall -Wno-implicit-function-declaration -O3 -pipe -w \
+          -fPIE -Wall -O3 -pipe -w \
           -I includes -I src -m64 -march=x86-64 -mno-80387 -mno-mmx -mno-red-zone \
           -mno-sse2 -mno-sse
 
@@ -79,5 +79,7 @@ deep-clean:
 	@echo -e "\033[1;31m[RM]\033[0m All build outputs"
 	@rm -rf $(OBJ_DIR) $(KERNEL)
 
+# Handling Debugging Infos
 version_info:
+	@echo -e "\033[1;32m[SH]\033[0m Fetching the versions of toolchains..."
 	@./versions.sh

source/includes/ahci.h

@@ -12,18 +12,16 @@
 #define AHCI_H
 
 #include <basics.h>
+#include <graphics.h>
 
-/**
- * @brief Base memory address for AHCI ports.
- */
-#define AHCI_PORT_BASE    0x400
-
-/**
- * @brief AHCI port command flags.
- */
-#define AHCI_PORT_CMD_ST  0x1       /**< Start command. */
-#define AHCI_PORT_CMD_FRE 0x10      /**< FIS receive enable. */
-#define AHCI_PORT_CMD_FR  0x400     /**< FIS receive running. */
+#define AHCI_PORT_DET_PRESENT 3
+#define AHCI_PORT_IPM_ACTIVE 1
+#define AHCI_PORT_CMD_ST    (1 << 0)
+#define AHCI_PORT_CMD_FRE   (1 << 4)
+#define AHCI_PORT_CMD_FR    (1 << 14)
+#define AHCI_PORT_CMD_CR    (1 << 15)
+#define READ_DMA_EXT        0x25
+#define SECTOR_SIZE         512
 
 /**
  * @brief AHCI device signatures.
@@ -33,122 +31,104 @@
 #define semb_disk         0xC33C0101
 #define port_multiplier   0x96690101
 
-/**
- * @brief Standard sector size in bytes.
- */
-#define SECTOR_SIZE 512
-
 /**
  * @brief AHCI command header structure.
  *
  * Represents the command header for a single AHCI port.
  */
-typedef struct {
-    uint16_t cfl:5;      /**< Command FIS length in DWORDS */
-    uint16_t a:1;        /**< ATAPI flag */
-    uint16_t w:1;        /**< Write flag (1 = Host to Device, 0 = Device to Host) */
-    uint16_t p:1;        /**< Prefetchable */
-    uint16_t r:1;        /**< Reset */
-    uint16_t b:1;        /**< BIST flag */
-    uint16_t c:1;        /**< Clear busy upon R_OK */
-    uint16_t rsv0:1;     /**< Reserved */
-    uint16_t pmp:4;      /**< Port multiplier port */
-    uint16_t prdtl;      /**< Number of PRDT entries */
-    uint32_t prdbc;      /**< Physical Region Descriptor byte count transferred */
-    uint32_t ctba;       /**< Command table base address (lower 32 bits) */
-    uint32_t ctbau;      /**< Command table base address upper 32 bits */
-    uint32_t rsv1[4];    /**< Reserved */
-} __attribute__((packed)) ahci_command_header_t;
+typedef struct __attribute__((packed)) {
+    /* first 16-bit flags */
+    uint16_t flags;      /* contains CFL(5), A, W, P, R, B, C, rsv0, PMP(4) */
+    uint16_t prdtl;      /* PRDT length (entries) */
+    uint32_t prdbc;      /* PRDT byte count transferred (updated by HBA) */
+    uint32_t ctba;       /* Command table descriptor base address (lower 32) */
+    uint32_t ctbau;      /* Command table descriptor base address upper 32 */
+    uint32_t rsv[4];
+} ahci_cmd_header_t;
+
+#define AHCI_CMD_HDR_CFL_MASK   0x001F  /* bits 0-4 */
+#define AHCI_CMD_HDR_A_BIT      0x0020
+#define AHCI_CMD_HDR_W_BIT      0x0040
+#define AHCI_CMD_HDR_P_BIT      0x0080
+#define AHCI_CMD_HDR_R_BIT      0x0100
+#define AHCI_CMD_HDR_B_BIT      0x0200
+#define AHCI_CMD_HDR_C_BIT      0x0400
+#define AHCI_CMD_HDR_PMP_MASK   0xF000  /* bits 12-15 */
 
 /**
  * @brief Physical Region Descriptor Table (PRDT) entry.
  */
-typedef struct {
-    uint32_t dba;        /**< Data base address */
-    uint32_t dbau;       /**< Data base address upper 32 bits */
-    uint32_t rsv0;       /**< Reserved */
-    uint32_t dbc:22;     /**< Byte count (maximum 4M) */
-    uint32_t rsv1:9;     
-    uint32_t i:1;        /**< Interrupt on completion */
-} __attribute__((packed)) prdt_entry_t;
+ typedef struct __attribute__((packed)) {
+    uint32_t dba;    /* Data base address (lower 32) */
+    uint32_t dbau;   /* Data base address upper 32 (if S64A supported) */
+    uint32_t reserved;
+    uint32_t dbc;    /* DW3: byte count and flags (use macros) */
+} prdt_entry_t;
+
 
 /**
  * @brief AHCI command table structure.
  */
-typedef struct {
-    uint8_t cfis[64];            /**< Command FIS */
-    uint8_t acmd[16];            /**< ATAPI command (optional) */
-    uint8_t rsv[48];             /**< Reserved */
-    prdt_entry_t prdt_entry[1];  /**< PRDT entries (can allocate more as needed) */
-} __attribute__((packed)) ahci_command_table_t;
+ typedef struct __attribute__((packed)) {
+    uint8_t cfis[64];
+    uint8_t acmd[16];
+    uint8_t reserved[48];
+    prdt_entry_t prdt[1]; /* flexible / variable sized in allocation */
+} ahci_cmd_table_t;
 
 /**
  * @brief AHCI port registers and command header pointer.
  */
-typedef volatile struct {
-    int32 clb;        /**< Command list base address (1KB aligned) */
-    int32 clbu;       /**< Command list base address upper 32 bits */
-    int32 fb;         /**< FIS base address (256-byte aligned) */
-    int32 fbu;        /**< FIS base address upper 32 bits */
-    int32 is;         /**< Interrupt status */
-    int32 ie;         /**< Interrupt enable */
-    int32 cmd;        /**< Command and status */
-    int32 rsv0;       /**< Reserved */
-    int32 tfd;        /**< Task file data */
-    int32 sig;        /**< Signature */
-    int32 ssts;       /**< SATA status (SCR0: SStatus) */
-    int32 sctl;       /**< SATA control (SCR2: SControl) */
-    int32 serr;       /**< SATA error (SCR1: SError) */
-    int32 sact;       /**< SATA active (SCR3: SActive) */
-    int32 ci;         /**< Command issue */
-    int32 sntf;       /**< SATA notification (SCR4: SNotification) */
-    int32 fbs;        /**< FIS-based switch control */
-    int32 rsv1[11];   /**< Reserved */
-    int32 vendor[4];  /**< Vendor specific */
-    ahci_command_header_t* cmd_list; /**< Pointer to command header array */
-} ahci_port;
+ typedef volatile struct {
+    uint32_t clb;        /* 0x00 Command list base address (lower 32) */
+    uint32_t clbu;       /* 0x04 Command list base address upper 32 */
+    uint32_t fb;         /* 0x08 FIS base address (lower 32) */
+    uint32_t fbu;        /* 0x0C FIS base address upper 32 */
+    uint32_t is;         /* 0x10 Interrupt status */
+    uint32_t ie;         /* 0x14 Interrupt enable */
+    uint32_t cmd;        /* 0x18 Command and status */
+    uint32_t rsv0;       /* 0x1C Reserved */
+    uint32_t tfd;        /* 0x20 Task file data */
+    uint32_t sig;        /* 0x24 Signature */
+    uint32_t ssts;       /* 0x28 SATA status (SStatus) */
+    uint32_t sctl;       /* 0x2C SATA control (SControl) */
+    uint32_t serr;       /* 0x30 SATA error (SError) */
+    uint32_t sact;       /* 0x34 SATA active (SActive) */
+    uint32_t ci;         /* 0x38 Command issue */
+    uint32_t sntf;       /* 0x3C SATA notification (SNotification) */
+    uint32_t fbs;        /* 0x40 FIS-based switching */
+    uint32_t rsv1[11];   /* 0x44 - 0x6F reserved */
+    uint32_t vendor[4];  /* 0x70 - 0x7F vendor specific */
+} ahci_port_t;
 
-/**
- * @brief AHCI controller registers.
- */
 typedef volatile struct {
-    int32 cap;         /**< Host Capabilities */
-    int32 ghc;         /**< Global Host Control */
-    int32 is;          /**< Interrupt Status */
-    int32 pi;          /**< Port Implemented */
-    int32 vs;          /**< Version */
-    int32 ccc_ctl;     /**< Command Completion Coalescing Control */
-    int32 ccc_pts;     /**< Command Completion Coalescing Ports */
-    int32 em_loc;      /**< Enclosure Management Location */
-    int32 em_ctl;      /**< Enclosure Management Control */
-    int32 cap2;        /**< Host Capabilities Extended */
-    int32 bohc;        /**< BIOS/OS Handoff Control and Status */
-    int8  rsv[0xA0-0x2C]; /**< Reserved */
-    int8  vendor[0x100-0xA0]; /**< Vendor specific */
-    ahci_port ports[32]; /**< AHCI port control registers */
-} ahci_controller;
+    uint32_t cap;       /* 0x00 Host capabilities (CAP) */
+    uint32_t ghc;       /* 0x04 Global host control (GHC) */
+    uint32_t is;        /* 0x08 Interrupt status */
+    uint32_t pi;        /* 0x0C Ports implemented */
+    uint32_t vs;        /* 0x10 Version */
+    uint32_t ccc_ctl;   /* 0x14 Command completion coalescing control */
+    uint32_t ccc_pts;   /* 0x18 Command completion ports */
+    uint32_t em_loc;    /* 0x1C Enclosure management location */
+    uint32_t em_ctl;    /* 0x20 Enclosure management control */
+    uint32_t cap2;      /* 0x24 Host capabilities extended */
+    uint32_t bohc;      /* 0x28 BIOS/OS handoff control and status */
+    uint8_t  rsv[0xA0 - 0x2C];   /* reserved bytes up to vendor area */
+    uint8_t  vendor[0x100 - 0xA0];/* vendor specific area */
+    /* 0x100 - start of port control registers (ports[0] starts here) */
+    ahci_port_t ports[32];       /* array of port structures (0x100.. ) */
+} ahci_hba_mem_t;
+
 
 /**
  * @brief Global AHCI controller pointer.
  */
-extern ahci_controller* global_ahci_ctrl;
+extern ahci_hba_mem_t* global_ahci_ctrl;
 
 /**
  * @brief Probes and detects all AHCI devices connected to the controller.
  * 
  * @param ahci_ctrl Pointer to the AHCI controller structure.
  */
-void detect_ahci_devices(ahci_controller* ahci_ctrl);
-
-/**
- * @brief Reads sectors from a port using polling mode.
- * 
- * @param port_number The AHCI port number to read from.
- * @param lba Logical block address to start reading.
- * @param sector_count Number of sectors to read.
- * @param buffer Pointer to the buffer to store data.
- * @return int 0 on success, negative on failure.
- */
-int ahci_read_sectors_polling(int port_number, uint64_t lba, uint32_t sector_count, void* buffer);
-
+void detect_ahci_devices(ahci_hba_mem_t* ahci_ctrl);
 #endif // AHCI_H

source/includes/algorithms/hashing.h

@@ -8,7 +8,12 @@
  * @copyright Copyright (c) Pradosh 2023
  * 
  */
+
+#ifndef HASHING_H
+#define HASHING_H
+
 #include <basics.h>
+#include <graphics.h>
 
 /**
  * @brief Verifies if the hash is working (not really initializing anything)
@@ -30,4 +35,6 @@ int64 hash_string(string data);
  * @param name The string to be hashed.
  * @return [int64] Hashed value
  */
-int64 baranium_hash(cstring name);
+int64 baranium_hash(cstring name);
+
+#endif

source/includes/commands/commands.h

@@ -0,0 +1,34 @@
+/**
+ * @file commands.h
+ * @author Pradosh ([email protected])
+ * @brief The almost fully replicated linux basic commands of sh.
+ * @version 0.1
+ * @date 2025-10-07
+ * 
+ * @copyright Copyright (c) Pradosh 2025
+ * 
+ */
+#ifndef COMMANDS_H
+#define COMMANDS_H
+
+#pragma once
+#include <basics.h>
+#include <graphics.h>
+
+extern struct FileSystem* global_fs;
+
+int cmd_echo(int argc, char** argv);
+int cmd_touch(int argc, char** argv);
+int cmd_rm(int argc, char** argv);
+int cmd_mkdir(int argc, char** argv);
+int cmd_cat(int argc, char** argv);
+int cmd_ls(int argc, char** argv);
+int cmd_pwd(int argc, char** argv);
+int cmd_cd(int argc, char** argv);
+int cmd_whoami(int argc, char** argv);
+int cmd_shutdown(int argc, char** argv);
+int cmd_reboot(int argc, char** argv);
+int cmd_fwfetch(int argc, char** argv);
+int cmd_help(int argc, char** argv);
+
+#endif

source/includes/commands/login.h

@@ -9,8 +9,12 @@
  * 
  */
 
+#ifndef LOGIN_H
+#define LOGIN_H
+
 #include <basics.h>
 #include <algorithms/hashing.h>
+#include <graphics.h>
 
 #define MAX_USERS_ALLOWED 7
 #define MAX_USERNAME_LENGTH 20
@@ -46,4 +50,6 @@ char* login_request();
  * @param username current username
  * @return Whether it was successful.
  */
-int ask_password(const char* username);
+int ask_password(const char* username);
+
+#endif

source/includes/cpuid2.h

@@ -8,10 +8,8 @@
  * @copyright Copyright (c) Pradosh 2023
  * 
  */
-#include <stdint.h>
-#include <stddef.h>
-#include <stdbool.h>
 #include <basics.h>
+#include <graphics.h>
 
 /**
  * @brief Executes the CPUID instruction with the given code and stores the results.

source/includes/drivers/rtl8139.h

@@ -11,9 +11,8 @@
 #ifndef rtl8139_h
 #define rtl8139_h
 
-#include <stdint.h>
-#include <stdbool.h>
 #include <basics.h>
+#include <graphics.h>
 #include <hal.h>
 
 // RTL8139 registers