first cleanup pass, re-organizing (#359)

* use std::shared_ptr instead of refs, rename files, collect common init
blocks

* more tidying, isolate fiberless stuff, share read_event

* share sw emulation headers across all opto-link readout

code in hardware limits on number of ROCs and ECONs

* document parameters to init

* ability to disable ROCs on an EcalSMM

* Apply clang-format --style=Google

---------

Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>

Author: tomeichlersmith

CMakeLists.txt

@@ -114,25 +114,25 @@ set(pflib_src
   src/pflib/GPIO.cxx
   src/pflib/Elinks.cxx
   src/pflib/Parameters.cxx
+  src/pflib/DAQ.cxx
   src/pflib/lpGBT.cxx
   src/pflib/lpgbt/lpGBT_ConfigTransport_I2C.cxx
   src/pflib/lpgbt/lpGBT_Registers.cxx
   src/pflib/lpgbt/lpGBT_Utility.cxx
   src/pflib/lpgbt/lpGBT_standard_configs.cxx
   src/pflib/lpgbt/I2C.cxx
   src/pflib/lpgbt/GPIO.cxx
-  src/pflib/TargetFiberless.cxx
   src/pflib/GPIO_HcalHGCROCZCU.cxx
   src/pflib/FastControlCMS_MMap.cxx
   src/pflib/ECOND_Formatter.cxx
   src/pflib/zcu/UIO.cxx
-  src/pflib/zcu/Elinks_zcu.cxx
   src/pflib/zcu/lpGBT_ICEC_ZCU_Simple.cxx
   src/pflib/zcu/zcu_elinks.cxx
-  src/pflib/zcu/zcu_DAQ.cxx
+  src/pflib/zcu/zcu_daq.cxx
   src/pflib/zcu/zcu_optolink.cxx
-  src/pflib/zcu/HcalBackplaneZCU.cxx
-  src/pflib/zcu/EcalSMMTarget.cxx
+  src/pflib/zcu/HcalBackplane.cxx
+  src/pflib/zcu/EcalSMM.cxx
+  src/pflib/zcu/HGCROCBoardFiberless.cxx
   src/pflib/Ecal.cxx
   src/pflib/Bias.cxx
 )
@@ -144,8 +144,8 @@ if (${Rogue_FOUND})
     src/pflib/bittware/bittware_elinks.cxx
     src/pflib/bittware/bittware_daq.cxx
     src/pflib/bittware/bittware_FastControl.cxx
-    src/pflib/bittware/HcalBackplaneBittware.cxx
-    src/pflib/bittware/EcalSMMTarget.cxx
+    src/pflib/bittware/HcalBackplane.cxx
+    src/pflib/bittware/EcalSMM.cxx
     )
 endif()
 

app/tool/main.cxx

@@ -352,14 +352,15 @@ int main(int argc, char* argv[]) {
       if (ilink < 0 or ilink > 1) {
         PFEXCEPTION_RAISE("BadLink", "ZCU EcalSMM ilink can only be 0 or 1");
       }
-      tgt.reset(pflib::makeTargetEcalSMMZCU(ilink));
+      auto rocmask = target.get<int>("rocmask", 0x3f);
+      tgt.reset(pflib::makeTargetEcalSMMZCU(ilink, rocmask));
       readout_cfg = pftool::State::CFG_ECALOPTO_ZCU;
       pftool::root()->hide(ONLY_FIBERLESS | ONLY_HCAL);
     } else if (target_type == "HcalBackplaneBittware") {
 #ifdef USE_ROGUE
       // need ilink to be in configuration
       auto ilink = target.get<int>("ilink");
-      auto boardmask = target.get<int>("boardmask", 0xff);
+      auto boardmask = target.get<int>("boardmask", 0xf);
       auto dev = target.get<std::string>("dev", "/dev/datadev_0");
       tgt.reset(pflib::makeTargetHcalBackplaneBittware(ilink, boardmask,
                                                        dev.c_str()));
@@ -374,7 +375,8 @@ int main(int argc, char* argv[]) {
       // need ilink to be in configuration
       auto ilink = target.get<int>("ilink");
       auto dev = target.get<std::string>("dev", "/dev/datadev_0");
-      tgt.reset(pflib::makeTargetEcalSMMBittware(ilink, dev.c_str()));
+      auto rocmask = target.get<int>("rocmask", 0x3f);
+      tgt.reset(pflib::makeTargetEcalSMMBittware(ilink, rocmask, dev.c_str()));
       readout_cfg = pftool::State::CFG_ECALOPTO_BW;
       pftool::root()->hide(ONLY_FIBERLESS | ONLY_HCAL);
 #else

include/pflib/DAQ.h

@@ -61,11 +61,20 @@ class DAQ {
   /// Advance link read pointer
   virtual void advanceLinkReadPtr() {}
 
-  // get any useful debugging data
+  /// get any useful debugging data
   virtual std::map<std::string, uint32_t> get_debug(uint32_t ask) {
     return std::map<std::string, uint32_t>();
   }
 
+  /**
+   * readout an event including emulation of the headers the firmware inserts
+   *
+   * The Bittware firmware includes headers when copying the data into the axi
+   * stream and we include those here so that the non-axis readout can have
+   * data that is in the same format as axis data.
+   */
+  std::vector<uint32_t> read_event_sw_headers();
+
  private:
   /// number of links
   int n_links;
@@ -75,8 +84,6 @@ class DAQ {
   int samples_, soi_;
 };
 
-DAQ* get_DAQ_zcu();
-
 }  // namespace pflib
 
 #endif  // PFLIB_DAQ_H_INCLUDED

include/pflib/ECON.h

@@ -17,7 +17,8 @@ namespace pflib {
  */
 class ECON {
  public:
-  ECON(I2C& i2c, uint8_t econ_base_addr, const std::string& type_version);
+  ECON(std::shared_ptr<I2C> i2c, uint8_t econ_base_addr,
+       const std::string& type_version);
 
   const std::string& type() const { return type_; }
   void setRunMode(bool active = true, int edgesel = -1, int fcmd_invert = -1);
@@ -77,7 +78,7 @@ class ECON {
   TestParameters::Builder testParameters();
 
  private:
-  I2C& i2c_;
+  std::shared_ptr<I2C> i2c_;
   uint8_t econ_base_;
   Compiler compiler_;
   std::string type_;
@@ -87,4 +88,4 @@ class ECON {
 
 }  // namespace pflib
 
-#endif  // PFLIB_ECON_H_INCLUDED
+#endif  // PFLIB_ECON_H_INCLUDED

include/pflib/Ecal.h

@@ -1,6 +1,5 @@
 #pragma once
 
-#include <map>
 #include <memory>
 #include <vector>
 
@@ -18,21 +17,31 @@ namespace pflib {
  */
 class EcalModule {
  public:
-  EcalModule(lpGBT& lpgbt, int i2cbus, int modulenumber);
+  /**
+   * Construct access to an EcalModule given the DAQ lpGBT
+   * it talks through
+   *
+   * @param[in] lpgbt accessor to the lpgbt
+   * @param[in] i2cbus bus on which the EcalModule is
+   * @param[in] modulenumber module ID number
+   * @param[in] roc_mask bit-mask saying if a board is activate/enabled (1)
+   * or inactive/disabled (0) - position i represents ROC i
+   */
+  EcalModule(lpGBT& lpgbt, int i2cbus, int modulenumber, uint8_t roc_mask);
 
   /** number of hgcrocs */
-  int nrocs() const { return 6; }
-  /// number of econds
-  int necons() const { return 2; }
+  int nrocs() const;
+  /// number of econs
+  int necons() const;
 
   /** do we have a roc with this id? */
-  bool have_roc(int iroc) const { return iroc >= 0 && iroc <= nrocs(); }
+  bool have_roc(int iroc) const;
 
   static constexpr const int ECON_D = 0;
   static constexpr const int ECON_T = 1;
 
   /** do we have an econ with this id? */
-  bool have_econ(int iecon) const { return iecon == ECON_D || iecon == ECON_T; }
+  bool have_econ(int iecon) const;
 
   /** get a list of the IDs we have set up */
   std::vector<int> roc_ids() const;
@@ -65,12 +74,18 @@ class EcalModule {
   lpGBT& lpGBT_;
   int i2cbus_;
   int imodule_;
-  std::unique_ptr<I2C> i2c_;
-  /// representation of Ecal HexaModule
-  std::vector<ROC> rocs_;
-  std::vector<ECON> econs_;
-  // Mapping ROC channel → ERX channel
+  std::shared_ptr<I2C> i2c_;
+  /// number of ROCs that are enabled
+  int n_rocs_;
+  /// up to 6 ROCs some of which could be disabled
+  std::array<std::unique_ptr<ROC>, 6> rocs_;
+  /// number of ECONs that are enabled
+  int n_econs_;
+  /// two ECONs
+  std::array<std::unique_ptr<ECON>, 2> econs_;
+
  private:
+  /// mapping of ROC halves to ECON-D eRx channels
   static const std::vector<std::pair<int, int>> roc_to_erx_map_;
 };
 
@@ -83,7 +98,7 @@ class EcalMotherboard {
   EcalModule& module(int imodule);
 
  private:
-  std::vector<std::shared_ptr<EcalModule*>> modules_;
+  std::vector<std::shared_ptr<EcalModule>> modules_;
 };
 
 }  // namespace pflib

include/pflib/HcalBackplane.h

@@ -14,9 +14,22 @@ namespace pflib {
  */
 class HcalBackplane : public Target {
  public:
+  /// virtual destructor since we'll be holding this as a Target
   virtual ~HcalBackplane() = default;
+
   HcalBackplane();
 
+  /**
+   * Common initialization for slow control given lpGBT
+   * objects and a mask for which HGCROC boards are connected
+   *
+   * @param[in] daq_lpgbt accessor to DAQ lpGBT
+   * @param[in] trig_lpgbt accessor to TRIG lpGBT
+   * @param[in] hgcroc_boards bit-mask saying if a board is active/enabled (1)
+   * or inactive/disabled (0) - the bit in position i represents board i
+   */
+  void init(lpGBT& daq_lpgbt, lpGBT& trig_lpgbt, int hgcroc_boards);
+
   /** number of boards */
   virtual int nrocs() override { return nhgcroc_; }
 
@@ -57,16 +70,6 @@ class HcalBackplane : public Target {
   const std::vector<std::pair<int, int>>& getRocErxMapping() override;
 
  protected:
-  /** Add a ROC to the set of ROCs */
-  void add_roc(int iroc, uint8_t roc_baseaddr,
-               const std::string& roc_type_version,
-               std::shared_ptr<I2C> roc_i2c, std::shared_ptr<I2C> bias_i2c,
-               std::shared_ptr<I2C> board_i2c);
-
-  /** Add a ECON to the set of ECONs */
-  void add_econ(int iecon, uint8_t econ_baseaddr, const std::string& econ_type,
-                std::shared_ptr<I2C> econ_i2c);
-
   /** Number of HGCROC boards in this system */
   int nhgcroc_;
 
@@ -76,22 +79,21 @@ class HcalBackplane : public Target {
   /** The GPIO interface */
   std::unique_ptr<GPIO> gpio_;
 
-  /** The I2C interfaces and objects for a HGCROC board */
-  struct ROCConnection {
-    pflib::ROC roc_;
-    std::shared_ptr<I2C> roc_i2c_;
-    pflib::Bias bias_;
-    std::shared_ptr<I2C> bias_i2c_;
-    std::shared_ptr<I2C> board_i2c_;
+  /**
+   * an HGCROC board contains one ROC, one Bias board
+   * and some other utilities that are accessible
+   * via the Bias C++ object
+   */
+  struct HGCROCBoard {
+    ROC roc;
+    Bias bias;
   };
-  std::map<int, ROCConnection> roc_connections_;
 
-  /** The I2C interface and object for a ECON board */
-  struct ECONConnection {
-    pflib::ECON econ_;
-    std::shared_ptr<I2C> i2c_;
-  };
-  std::map<int, ECONConnection> econ_connections_;
+  /// the backplane can hold up to 4 HGCROC boards
+  std::array<std::unique_ptr<HGCROCBoard>, 4> rocs_;
+
+  /// the ECONs on the ECON Mezzanine on this backplane
+  std::array<std::unique_ptr<ECON>, 3> econs_;
 };
 
 }  // namespace pflib

include/pflib/ROC.h

@@ -19,7 +19,8 @@ class ROC {
   static const int N_REGISTERS_PER_PAGE = 32;
 
  public:
-  ROC(I2C& i2c, uint8_t roc_base_addr, const std::string& type_version);
+  ROC(std::shared_ptr<I2C> i2c, uint8_t roc_base_addr,
+      const std::string& type_version);
 
   void setRunMode(bool active = true);
   bool isRunMode();
@@ -182,7 +183,7 @@ class ROC {
   TestParameters::Builder testParameters();
 
  private:
-  I2C& i2c_;
+  std::shared_ptr<I2C> i2c_;
   uint8_t roc_base_;
   std::string type_version_;
   Compiler compiler_;

include/pflib/Target.h

@@ -123,8 +123,8 @@ Target* makeTargetFiberless();
 Target* makeTargetHcalBackplaneZCU(int ilink, uint8_t board_mask);
 Target* makeTargetHcalBackplaneBittware(int ilink, uint8_t board_mask,
                                         const char* dev);
-Target* makeTargetEcalSMMZCU(int ilink);
-Target* makeTargetEcalSMMBittware(int ilink, const char* dev);
+Target* makeTargetEcalSMMZCU(int ilink, uint8_t roc_mask);
+Target* makeTargetEcalSMMBittware(int ilink, uint8_t rocmask, const char* dev);
 
 }  // namespace pflib
 

include/pflib/zcu/zcu_daq.h

@@ -4,26 +4,32 @@
 namespace pflib {
 namespace zcu {
 
+/**
+ * Data capture on ZCU when connected with an optical fiber
+ */
 class ZCU_Capture : public DAQ {
  public:
+  virtual ~ZCU_Capture() = default;
   ZCU_Capture();
-  virtual void reset();
-  virtual int getEventOccupancy();
-  virtual void setupLink(int ilink, int l1a_delay, int l1a_capture_width) {
+  virtual void reset() final;
+  virtual int getEventOccupancy() final;
+  virtual void setupLink(int ilink, int l1a_delay,
+                         int l1a_capture_width) final {
     // none of these parameters are relevant for the econd capture, which is
     // data-pattern based
   }
-  virtual void getLinkSetup(int ilink, int& l1a_delay, int& l1a_capture_width) {
+  virtual void getLinkSetup(int ilink, int& l1a_delay,
+                            int& l1a_capture_width) final {
     l1a_delay = -1;
     l1a_capture_width = -1;
   }
-  virtual void bufferStatus(int ilink, bool& empty, bool& full);
-  virtual void setup(int econid, int samples_per_ror, int soi);
-  virtual void enable(bool doenable);
-  virtual bool enabled();
-  virtual std::vector<uint32_t> getLinkData(int ilink);
-  virtual void advanceLinkReadPtr();
-  virtual std::map<std::string, uint32_t> get_debug(uint32_t ask);
+  virtual void bufferStatus(int ilink, bool& empty, bool& full) final;
+  virtual void setup(int econid, int samples_per_ror, int soi) final;
+  virtual void enable(bool doenable) final;
+  virtual bool enabled() final;
+  virtual std::vector<uint32_t> getLinkData(int ilink) final;
+  virtual void advanceLinkReadPtr() final;
+  virtual std::map<std::string, uint32_t> get_debug(uint32_t ask) final;
 
  private:
   UIO capture_;