diff --git a/targets/arm/mikroe/nuvoton/include/hal_ll_mstpcr.h b/targets/arm/mikroe/nuvoton/include/hal_ll_mstpcr.h
index 7a181beaa0..b2dbd5c97c 100644
--- a/targets/arm/mikroe/nuvoton/include/hal_ll_mstpcr.h
+++ b/targets/arm/mikroe/nuvoton/include/hal_ll_mstpcr.h
@@ -63,6 +63,21 @@ extern "C"{
 #define CLK_CLKDIV1     ( uint32_t * )( CLK_BASE + 0x24UL )
 #define CLK_CLKDIV4     ( uint32_t * )( CLK_BASE + 0x30UL )
 
+typedef struct
+{
+    uint32_t hclk;   
+    uint32_t pclk;   
+} clk_clocks_t;
+
+/**
+ * @brief Gets clock values.
+ *
+ * @param clk_clocks_t[OUT] CLK clocks structure.
+ *
+ * @return *clk_clocks_t Structure containing clock values.
+ */
+void CLK_GetClocksFrequency( clk_clocks_t* CLK_Clocks );
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/targets/arm/mikroe/nuvoton/src/i2c/implementation_1/hal_ll_i2c_master.c b/targets/arm/mikroe/nuvoton/src/i2c/implementation_1/hal_ll_i2c_master.c
index 36edbb2ce0..0003896a07 100644
--- a/targets/arm/mikroe/nuvoton/src/i2c/implementation_1/hal_ll_i2c_master.c
+++ b/targets/arm/mikroe/nuvoton/src/i2c/implementation_1/hal_ll_i2c_master.c
@@ -62,10 +62,8 @@ static volatile hal_ll_i2c_master_handle_register_t hal_ll_module_state[I2C_MODU
 
 #define HAL_LL_I2C_CLK_DIV_MIN_VALUE                (4)
 
-#define HAL_LL_I2C_STATUS0_REPEATED_START_VALUE     0x10UL
-#define HAL_LL_I2C_STATUS0_IDLE_VALUE               0xF8UL
-
-#define HAL_LL_I2C_PCLK                             48000000
+#define HAL_LL_I2C_STATUS0_REPEATED_START_VALUE     (0x10UL)
+#define HAL_LL_I2C_STATUS0_IDLE_VALUE               (0xF8UL)
 
 /*!< @brief Helper macro for getting hal_ll_module_state address */
 #define hal_ll_i2c_get_module_state_address ((hal_ll_i2c_master_handle_register_t *)*handle)
@@ -328,18 +326,6 @@ static hal_ll_err_t hal_ll_i2c_master_wait_for_idle( hal_ll_i2c_hw_specifics_map
   */
 static uint32_t hal_ll_i2c_get_speed( uint32_t bit_rate );
 
-/**
-  * @brief  Set I2C speed registers based on clock and bit rate.
-  *
-  * Sets ICMR1, ICBRL, and ICBRH values based on the PCLKB clock
-  * and desired I2C speed (100kHz, 400kHz, or 1MHz).
-  *
-  * @param[in]  *map - I2C hardware context.
-  *
-  * @note Supports only 24MHz and 32MHz PCLKB.
-  */
-static void hal_ll_i2c_calculate_speed( hal_ll_i2c_hw_specifics_map_t *map );
-
 /**
   * @brief  Perform a read on the I2C bus.
   *
@@ -817,16 +803,13 @@ static hal_ll_err_t hal_ll_i2c_master_wait_for_idle( hal_ll_i2c_hw_specifics_map
     }
 }
 
-static void hal_ll_i2c_calculate_speed( hal_ll_i2c_hw_specifics_map_t *map ) {
-    hal_ll_i2c_base_handle_t *hal_ll_hw_reg = hal_ll_i2c_get_base_struct( map->base );
-
-    // TODO - Define the function behavior here!
-}
-
 static void hal_ll_i2c_hw_init( hal_ll_i2c_hw_specifics_map_t *map ) {
     hal_ll_i2c_base_handle_t *hal_ll_hw_reg = hal_ll_i2c_get_base_struct( map->base );
+    clk_clocks_t clk_clocks;
+
+    CLK_GetClocksFrequency( &clk_clocks );
 
-    uint16_t clk_div = ( HAL_LL_I2C_PCLK / ( 4 * map->speed ) ) - 1;
+    uint16_t clk_div = ( clk_clocks.pclk / ( 4 * map->speed ) ) - 1;
 
     if ( clk_div < HAL_LL_I2C_CLK_DIV_MIN_VALUE )
         clk_div = HAL_LL_I2C_CLK_DIV_MIN_VALUE;
diff --git a/targets/arm/mikroe/nuvoton/src/spi_master/implementation_1/hal_ll_spi_master.c b/targets/arm/mikroe/nuvoton/src/spi_master/implementation_1/hal_ll_spi_master.c
index 0b56c8922b..7425fa628f 100644
--- a/targets/arm/mikroe/nuvoton/src/spi_master/implementation_1/hal_ll_spi_master.c
+++ b/targets/arm/mikroe/nuvoton/src/spi_master/implementation_1/hal_ll_spi_master.c
@@ -231,18 +231,6 @@ static void hal_ll_spi_master_module_enable( uint8_t module_index );
   */
 static hal_ll_spi_master_hw_specifics_map_t *hal_ll_get_specifics( handle_t handle );
 
-/**
-  * @brief  Set SPI Master bit rate.
-  *
-  * Calculates and sets the SPI bit rate by configuring the SPBR register,
-  * based on the system clock, desired speed, and BRDV setting.
-  *
-  * @param[in]  *map Object-specific context handler.
-  * @return None
-  *
-  */
-static void hal_ll_spi_master_set_bit_rate( hal_ll_spi_master_hw_specifics_map_t *map );
-
 /**
   * @brief  Full SPI Master module initialization procedure.
   *
@@ -750,16 +738,13 @@ static void hal_ll_spi_master_module_enable( uint8_t module_index ) {
     }
 }
 
-static void hal_ll_spi_master_set_bit_rate( hal_ll_spi_master_hw_specifics_map_t *map ) {
-    hal_ll_spi_master_base_handle_t *hal_ll_hw_reg = (hal_ll_spi_master_base_handle_t *)map->base;
-
-    // TODO - Define the function behavior here!
-}
-
 static void hal_ll_spi_master_hw_init( hal_ll_spi_master_hw_specifics_map_t *map ) {
     hal_ll_spi_master_base_handle_t *hal_ll_hw_reg = (hal_ll_spi_master_base_handle_t *)map->base;
+    clk_clocks_t clk_clocks;
+
+    CLK_GetClocksFrequency( &clk_clocks );
 
-   uint16_t clk_div = ( HAL_LL_SPI_PCLK / map->speed ) - 1;
+   uint16_t clk_div = ( clk_clocks.pclk / map->speed ) - 1;
 
     if ( clk_div < HAL_LL_SPI_CLK_DIV_MIN_VALUE )
         clk_div = HAL_LL_SPI_CLK_DIV_MIN_VALUE;
@@ -767,7 +752,7 @@ static void hal_ll_spi_master_hw_init( hal_ll_spi_master_hw_specifics_map_t *map
     if ( clk_div > HAL_LL_SPI_CLK_DIV_MAX_VALUE )
         clk_div = HAL_LL_SPI_CLK_DIV_MAX_VALUE;
 
-    map->hw_actual_speed = HAL_LL_SPI_PCLK / ( clk_div + 1 );
+    map->hw_actual_speed = clk_clocks.pclk / ( clk_div + 1 );
 
     write_reg( &( hal_ll_hw_reg->clkdiv ), clk_div );
 
diff --git a/targets/arm/mikroe/nuvoton/src/tim/implementation_1/hal_ll_tim.c b/targets/arm/mikroe/nuvoton/src/tim/implementation_1/hal_ll_tim.c
index a95784bb7f..7719e20d2f 100644
--- a/targets/arm/mikroe/nuvoton/src/tim/implementation_1/hal_ll_tim.c
+++ b/targets/arm/mikroe/nuvoton/src/tim/implementation_1/hal_ll_tim.c
@@ -81,8 +81,6 @@ static volatile hal_ll_tim_handle_register_t hal_ll_module_state[ TIM_MODULE_COU
 
 #define TIM_PWMCMPDAT_CMP_MASK              0xFFFFUL
 
-#define CLK_FREQUENCY                       96000000
-
 #define PERIOD_MAX                          0xFFFFUL
 
 //#define HAL_LL_TIM_AF_CONFIG (GPIO_CFG_DIGITAL_OUTPUT | GPIO_CFG_PORT_PULL_UP_ENABLE)
@@ -518,8 +516,10 @@ static void hal_ll_tim_module_enable( uint8_t module_index, bool hal_ll_state )
 }
 
 static uint32_t hal_ll_tim_clock_source() {
-    // TODO - Define the function behavior here!
-    return CLK_FREQUENCY;
+    clk_clocks_t clk_clocks;
+    CLK_GetClocksFrequency( &clk_clocks );
+    
+    return clk_clocks.pclk;
 }
 
 static void hal_ll_tim_map_pin( uint8_t module_index, uint8_t index ) {
diff --git a/targets/arm/mikroe/nuvoton/src/uart/implementation_1/hal_ll_uart.c b/targets/arm/mikroe/nuvoton/src/uart/implementation_1/hal_ll_uart.c
index ab8d511d09..e9ed5351db 100644
--- a/targets/arm/mikroe/nuvoton/src/uart/implementation_1/hal_ll_uart.c
+++ b/targets/arm/mikroe/nuvoton/src/uart/implementation_1/hal_ll_uart.c
@@ -128,9 +128,6 @@ static volatile hal_ll_uart_handle_register_t hal_ll_module_state[ UART_MODULE_C
 #define HAL_LL_UART_ACCEPTABLE_ERROR                (float)1.0
 
 #define hal_ll_uart_get_baud_error(_baud_real,_baud) (((float)(abs(_baud_real-_baud))/_baud)*100)
-
-
-#define HAL_LL_UART_PCLK_VALUE                      48000000
                                              
 /*!< @brief UART HW register structure. */
 typedef struct {
@@ -959,8 +956,10 @@ static void hal_ll_uart_set_baud_bare_metal( hal_ll_uart_hw_specifics_map_t *map
 }
 
 static uint32_t hal_ll_uart_get_clock_speed( void ) {
-    // TODO - Define the function behavior here!
-    return HAL_LL_UART_PCLK_VALUE;
+    clk_clocks_t clk_clocks;
+    CLK_GetClocksFrequency( &clk_clocks );
+    
+    return clk_clocks.pclk;
 }
 
 static void hal_ll_uart_set_stop_bits_bare_metal( hal_ll_uart_hw_specifics_map_t *map ) {