From 0089cdbac56250220338ea1dd73e59eccebdeb4f Mon Sep 17 00:00:00 2001
From: Tobias Blesgen <75844238+NarGrish@users.noreply.github.com>
Date: Wed, 12 Feb 2025 13:18:04 +0100
Subject: [PATCH] Update firmware.rst

---
 docs/firmware.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/firmware.rst b/docs/firmware.rst
index 6890dd1fc..e84224903 100644
--- a/docs/firmware.rst
+++ b/docs/firmware.rst
@@ -4,7 +4,7 @@ Firmware
 
 FPGA firmware consists of very simple single master bus definition and set of standard modules used by DAQ systems.
 
-Typical firmware consists of basil bus connecting all modules. Control modules witch provide configuration to DUT (like SPI/GPIO) and data taking modules (like data receivers). Received data (32 bit) are stored in the FIFO (large extremal memory) and can be continuously pulled from host application. Data from different modules are identified by source codding in 32bit data words.
+Typical firmware consists of a basil bus connecting all modules. Control modules which provide configuration to DUT (like SPI/GPIO) and data taking modules (like data receivers). Received data (32 bit) are stored in the FIFO (large extremal memory) and can be continuously pulled from host application. Data from different modules are identified by source codding in 32bit data words.
 
 .. blockdiag::