[Feature request] Allow keyword /line ignore

[ag943]

Hi,

Thank you for the great work on this extension, I use it every day and it saves me a lot of time 😄 .
In my projects I have some documents that I pre-process before compiling them. These contain words that are not compliant vhdl words, and I would like to ignore them in the VHDL-LS parsing (to be able to work in these documents before pre-processing).

Do you think it would be possible to have a feature allowing for an exclusion list ? Like all words / all lines beginning with a certain character would be ignored by the tool.

Thank you for the consideration and have a good day,

Arnaud