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README.md

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# Clio Artifact
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# Clio System
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Clio is a Hardware-Software Co-Designed Disaggregated Memory System.
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The paper has been accepted to ASPLOS'22.
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We are still working on the final version.
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You can find a pre-publication version [here](https://arxiv.org/pdf/2108.03492.pdf).
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Clio is a disaggregated memory system that virtualizes,
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protects, and manages disaggregated memory at hardware-based
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memory nodes. More details in our ASPLOS'22 paper [here](https://arxiv.org/pdf/2108.03492.pdf).
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**ASPLOS'22 Artifact Evaluators, please see [Documentation/asplos-ae.md](./Documentation/asplos-ae.md).**
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This repo contains Clio's FPGA hardware design, host side software, and testing program.
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## System Architetcure
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The Clio hardware includes a new virtual memory
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system, a customized network system, and a framework for computation offloading
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<img src="Documentation/arch.png" alt="drawing" width="500"/>
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## Documentation
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To debug Clio, see [Documentation/debug.md](./Documentation/debug.md).
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**ASPLOS'22 Artifact Evaluators, please see [Documentation/asplos-ae.md](./Documentation/asplos-ae.md).**
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## Repo Layout
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High-level layout:

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