We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent dc24305 commit 8cbb287Copy full SHA for 8cbb287
niosv_g/tinyml_liteRT/sources/README.md
@@ -25,7 +25,7 @@ This design demonstrates the TinyML application using LiteRT for microcontroller
25
## Documentation
26
27
- **Title**: Design Document
28
-**URL**: https://github.com/altera-fpga/agilex5e-nios-ed/blob/rel/25.3.0/niosv_g/tinyml_liteRT/img/block_diagram.png
+**URL**: https://github.com/altera-fpga/agilex5e-nios-ed/blob/rel/25.3.0/niosv_g/tinyml_liteRT/docs/Nios_Vg_Processor_TinyML_Design_on_Agilex_5_FPGA.md
29
30
# Getting Started
31
@@ -104,4 +104,4 @@ niosv-download -g ready_to_test/tflite_app.elf -c 1
104
- Verify the output on the terminal by using the following command in the terminal:
105
```
106
juart-terminal -d 1 -c 1 -i 0
107
-```
+```
0 commit comments