fix(riscv/interrupts): call generic IRQC function for sending IPIs

When using IMSIC, IPIs are sent through direct MSI write in the
interrupt file of the target hart. The path through OpenSBI
(sbi_send_ipi) is not suitable since SUPERVISOR SOFTWARE INTERRUPTS
(SSI) are not enabled in this scenario.

By using the generic irqc_send_ipi() function, the IPI sending process
is handled correctly in all the possible configurations (PLIC, APLIC,
IMSIC).

Signed-off-by: Filippo Fontana <[email protected]>
Signed-off-by: Jose Martins <[email protected]>

Author: filippofontana

src/arch/riscv/interrupts.c

@@ -45,7 +45,7 @@ void interrupts_arch_ipi_send(cpuid_t target_cpu)
     if (USE_ACLINT_IPI()) {
         aclint_send_ipi(target_cpu);
     } else {
-        sbi_send_ipi(1UL << target_cpu, 0);
+        irqc_send_ipi(target_cpu);
     }
 }
 

src/arch/riscv/irqc/aia/imsic.c

@@ -80,9 +80,9 @@ void imsic_inject_pend(size_t guest_file, irqid_t intp_id)
     csrs_vsireg_clear(1UL << imsic_eie_bit(intp_id));
 }
 
-void imsic_send_msi(cpuid_t target_cpu, irqid_t ipi_id)
+void imsic_send_msi(cpuid_t target_cpu)
 {
-    imsic[target_cpu]->s_file.seteipnum_le = ipi_id;
+    imsic[target_cpu]->s_file.seteipnum_le = interrupts_ipi_id;
 }
 
 void imsic_handle(void)

src/arch/riscv/irqc/aia/inc/imsic.h

@@ -71,12 +71,8 @@ void imsic_set_enbl(irqid_t intp_id);
  *        Only little endian is supported.
  *
  * @param target_cpu The ID of the target CPU
- * @param imsic_file the target interrupt file.
- *                   0 is the hypervisor interrupt file;
- *                   N is for guest N;
- * @param ipi_id The ID of the IPI to send.
  */
-void imsic_send_msi(cpuid_t target_cpu, irqid_t ipi_id);
+void imsic_send_msi(cpuid_t target_cpu);
 
 /**
  * @brief Inject an interrupt into a guest.

src/arch/riscv/irqc/aia/inc/irqc.h

@@ -64,13 +64,12 @@ static inline irqid_t irqc_reserve(irqid_t pintp_id)
 #endif
 }
 
-static inline void irqc_send_ipi(cpuid_t target_cpu, irqid_t ipi_id)
+static inline void irqc_send_ipi(cpuid_t target_cpu)
 {
 #if (IRQC == APLIC)
-    UNUSED_ARG(ipi_id);
     sbi_send_ipi(1UL << target_cpu, 0);
 #elif (IRQC == AIA)
-    imsic_send_msi(target_cpu, ipi_id);
+    imsic_send_msi(target_cpu);
 #endif
 }
 

src/arch/riscv/irqc/plic/inc/irqc.h

@@ -31,9 +31,8 @@ static inline irqid_t irqc_reserve(irqid_t pintp_id)
     return pintp_id;
 }
 
-static inline void irqc_send_ipi(cpuid_t target_cpu, irqid_t ipi_id)
+static inline void irqc_send_ipi(cpuid_t target_cpu)
 {
-    UNUSED_ARG(ipi_id);
     sbi_send_ipi(1UL << target_cpu, 0);
 }