uart_tx_rx_demo

[joyhope]

I do not have x305 board, I use the sample in ch32v20x with minor changes for SysTick->CNT. In funconfig.h, I removed CPU define. I tried, using PB10, PB11 as the demo, but I could not get anything.

Is there anything I missing？

[joyhope]

It is my problem, I found there are many differents for two CPUs.

Try close to the original demo: UART3 is using the same PB10, PB11, DMA had to use DMA 2, 3 for TX, RX.

I make changed, but it has not work.

`#include "ch32fun.h"
#include <stdio.h>

// Set UART baud rate here
#define UART_BR 115200

// Define your RX buffer and its size
#define RX_BUFFER_SIZE 512
uint8_t rx_buffer[RX_BUFFER_SIZE];

// Variable to store the current RX buffer write position (updated by the IDLE interrupt)
volatile uint16_t rx_buffer_write_pos = 0;

// Variable to store the current RX buffer read position
volatile uint16_t rx_buffer_read_pos = 0;

/**

• USART3 IDLE interrupt handler.
  */
  attribute( ( interrupt ) ) attribute( ( section( ".srodata" ) ) ) void USART3_IRQHandler( void );
  void USART3_IRQHandler( void )
  {
  // Check for IDLE interrupt
  if ( USART3->STATR & USART_STATR_IDLE )
  {
  // Clear the IDLE interrupt flag.
  // Source, WCH documentation: reading status and then data register clears the idle bit;
  USART3->STATR;
  USART3->DATAR;

   // Update the position so the rx functions can read the data.
   rx_buffer_write_pos = ( RX_BUFFER_SIZE - DMA1_Channel3->CNTR ) % RX_BUFFER_SIZE;
  

  }
  }

/**

• Initialize the USART pheripheral
  */
  static void uart_setup( void )
  {
  // Enable UART and GPIOB
  #if 0
  RCC->APB2PCENR |= RCC_APB2Periph_GPIOB | RCC_APB1Periph_USART3;
  #else
  funGpioInitB();
  #endif

#if 0
// Setup PB10 as TX
GPIOB->CFGHR =
( GPIOB->CFGHR & ~( 0xF << ( 4 * 2 ) ) ) | ( ( GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF ) << ( 4 * 2 ) );

// Setup PB11 as RX
GPIOB->CFGHR = ( GPIOB->CFGHR & ~( 0xF << ( 4 * 3 ) ) ) | ( ( GPIO_Speed_In | GPIO_CNF_IN_FLOATING ) << ( 4 * 3 ) );

#else
funPinMode(PB10, (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF));
funPinMode(PB11, (GPIO_Speed_In | GPIO_CNF_IN_FLOATING));
#endif
// Setup UART for Tx 8n1
USART3->CTLR1 = USART_WordLength_8b | USART_Parity_No | USART_Mode_Tx | USART_Mode_Rx;
USART3->CTLR2 = USART_StopBits_1;

// Enable Tx and Rx DMA event
USART3->CTLR3 = USART_DMAReq_Tx | USART_DMAReq_Rx | USART_HardwareFlowControl_None;

// Set baud rate and enable UART
USART3->BRR = ( ( FUNCONF_SYSTEM_CORE_CLOCK ) + ( UART_BR ) / 2 ) / ( UART_BR );
USART3->CTLR1 |= CTLR1_UE_Set;

}

/**

• Initialize the DMA channels for UART transmission and reception
  */
  static void dma_uart_dma_setup( void )
  {
  // Enable DMA peripheral
  RCC->AHBPCENR = RCC_AHBPeriph_SRAM | RCC_AHBPeriph_DMA1;

  // --- Configure DMA Channel 4 for UART transmission ---

  // Disable channel just in case there is a transfer in progress
  DMA1_Channel2->CFGR &= ~DMA_CFGR1_EN;

  // USART3 TX uses DMA channel 2
  DMA1_Channel2->PADDR = (uint32_t)&USART3->DATAR;

  // MEM2MEM: 0 (memory to peripheral)
  // PL: 0 (low priority since UART is a relatively slow peripheral)
  // MSIZE/PSIZE: 0 (8-bit)
  // MINC: 1 (increase memory address)
  // CIRC: 0 (one shot)
  // DIR: 1 (read from memory)
  // TEIE: 0 (no tx error interrupt)
  // HTIE: 0 (no half tx interrupt)
  // TCIE: 0 (transmission complete interrupt enable)
  // EN: 0 (do not enable DMA yet)
  DMA1_Channel2->CFGR = DMA_CFGR1_MINC | DMA_CFGR1_DIR;

  // --- Configure DMA Channel 5 for UART reception ---

  // Disable channel just in case there is a transfer in progress
  DMA1_Channel3->CFGR &= ~DMA_CFGR1_EN;

  // Set the memory address to the RX buffer
  DMA1_Channel3->MADDR = (uint32_t)rx_buffer;

  // Set the peripheral address to the USART3 data register
  DMA1_Channel3->PADDR = (uint32_t)&USART3->DATAR;

  // Set the number of data to transfer to the size of the RX buffer
  DMA1_Channel3->CNTR = RX_BUFFER_SIZE;

  // MEM2MEM: 0 (memory to peripheral)
  // PL: 0 (low priority)
  // MSIZE/PSIZE: 0 (8-bit)
  // MINC: 1 (increase memory address)
  // CIRC: 1 (circular mode for continuous reception)
  // DIR: 0 (read from peripheral)
  // TEIE: 0 (no tx error interrupt)
  // HTIE: 0 (no half tx interrupt)
  // TCIE: 0 (transmission complete interrupt enable)
  // EN: 0 (do not enable DMA yet)
  DMA1_Channel3->CFGR = DMA_CFGR1_MINC | DMA_CFGR1_CIRC;
  }

/**

• Transmit data over UART using DMA
  */
  static void dma_uart_tx( const void *data, uint32_t len )
  {
  // Disable DMA channel (just in case a transfer is pending)
  DMA1_Channel2->CFGR &= ~DMA_CFGR1_EN;
  // Set transfer length and source address
  DMA1_Channel2->CNTR = len;
  DMA1_Channel2->MADDR = (uint32_t)data;
  // Enable DMA channel to start the transfer
  DMA1_Channel2->CFGR |= DMA_CFGR1_EN;
  }

/**

• Receive data from UART with timeout

• Due to the setup this function will block until the line is idle.
  */
  static uint16_t dma_uart_rx( uint8_t *data, int len, uint16_t timeout_ms )
  {
  uint32_t ticks = Ticks_from_Ms( timeout_ms );
  uint32_t targettime = SysTick->CNT + ticks;
  uint16_t bytes_read = 0;

  // Read data from the circular buffer until the requested length is reached or timeout occurs
  while ( bytes_read < len && ( (int32_t)( SysTick->CNT - targettime ) ) < 0 )
  {
  // Check if there is data available in the circular buffer
  if ( rx_buffer_read_pos != rx_buffer_write_pos )
  {
  // Copy a byte from the circular buffer to the output buffer
  data[bytes_read++] = rx_buffer[rx_buffer_read_pos];

   	// Update the read position, handling wrap-around
   	rx_buffer_read_pos = ( rx_buffer_read_pos + 1 ) % RX_BUFFER_SIZE;
   }
  

  }

  // Return the number of bytes actually read
  return bytes_read;
  }

/**

• Return the number of bytes available in the RX buffer
  */
  static uint16_t dma_uart_available()
  {
  return rx_buffer_write_pos - rx_buffer_read_pos;
  }

/**

• Enable UART reception with DMA and IDLE line detection interrupt
  */
  static void dma_uart_rx_enable( void )
  {
  // Enable DMA channel to start the transfer
  DMA1_Channel3->CFGR |= DMA_CFGR1_EN;

  // Enable DMA reception in USART3
  USART3->CTLR3 |= USART_CTLR3_DMAR;

  // Enable IDLE line detection interrupt
  USART3->CTLR1 |= USART_CTLR1_IDLEIE;
  NVIC_EnableIRQ( USART3_IRQn );
  }

int main( void )
{
SystemInit();

uart_setup();
dma_uart_dma_setup();
dma_uart_rx_enable();

static const uint8_t message[] = "Echo example\r\n";
dma_uart_tx( message, sizeof( message ) );
printf("uart rx tx start\r\n");
while ( 1 )
{
	// Check if data is available in the RX buffer
	int bytes_available = dma_uart_available();
	if ( bytes_available > 0 )
	{
		uint8_t buffer[RX_BUFFER_SIZE + 6] = { 0 };

		buffer[0] = 'E';
		buffer[1] = 'c';
		buffer[2] = 'h';
		buffer[3] = 'o';
		buffer[4] = ':';
		buffer[5] = ' ';

		// Timeout is set to 10ms, but it shouldn't be necessary as data is already available
		int bytes_received = dma_uart_rx( &buffer[6], bytes_available, 10 );

		printf("received %d\r\n", bytes_received);
		// Respond with 'Echo: ' + received data
		dma_uart_tx( buffer, bytes_received + 6 );
	}
}

}
`

[joyhope]

Missing rcc setup

RCC->APB1PCENR |= RCC_APB1Periph_USART3;
RCC->APB2PCENR |= RCC_APB2Periph_GPIOB ;

The code works..

[joyhope]

The library is very helpful for the ch32 serial cpu. Thanks to the author.

[joyhope]

small change:
static uint16_t dma_uart_available() { return (rx_buffer_write_pos - rx_buffer_read_pos + RX_BUFFER_SIZE) % RX_BUFFER_SIZE; }

[cnlohr]

@joyhope would you be up for submitting a demo via PR to the examples_v20x folder?

[cnlohr]

@joyhope Would you please consider pushing this as an actual demo? A number of people would appreciate it, and, your issue is poorly formatted, so it would be difficult for people to get the information they need from it.