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ch5xx improvements #694

@biemster

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@biemster

While adding support for the ch5xx series I cut some corners here and there, and left some optimisations for later. This ticket will keep track of these things so they are not forgotten, but it does not mean I have to implement them! So please feel free to open a PR if you want to work on, or have a solution for any of these.

  • Registers: there are things like unique ID (ROM_CFG_MAC_ADDR) and temperature calibration (ROM_CFG_TMP_25C) which are not in ch5xxhw.h yet.

  • Startup: The startup of ch32 is taken, while the ch5xx series are slightly different. It works fine, but there might be room for optimisation
  • Startup: Add highcode sections for all ch5xx, currently only ch58x and ch59x are implemented (iSLER fixes for #694 #798)
  • Startup: The ch5xx startup has one extra 0 entry at the beginning of the vector compared to the ch32 startup. This causes the magic bytes to be on an index one off compared to the EVT

  • SystemInit: Not all clock cfg settings are tested, and some are giving odd behavior (in the program itself or in the debug interface)
  • SystemInit: The flash configs that go together with the clock speed are not optimized, or documented. It is possible that for lower clock speeds there are unnecessary wait states configured, slowing down execution.
  • SystemInit: Clock calibrations like LSI calib or HSE capacitance are not done.
  • SystemInit: rename CLK_SOURCE_CH5XX to something FUNCONF_ (what was I thinking!)

  • Low Power: LowPowerIdle needs to be called at least once before LowPowerSleep works properly.
  • Low Power: The low power functions seem a bit out of place in ch5xxhw.h, they probably should move to extralibs/ch5xx_lowpower.h (and the RTC functions connected with that should be merged into extralibs/rtc.h)

  • iSLER: AccessAddress should be configurable, it is now hardcoded to BED6 (iSLER fixes for #694 #798)
  • iSLER: The chips supporting S2/S8 show weird behavior on S8 mostly
  • iSLER: There are several timers based on frame length, and some are way off resulting in unnecessary idle times / power draw. @iracigt found a tx done irq on 573, so if that is common we should swap to that.
  • iSLER: RSSI on received frames seems to return 0x02 almost exclusively, there must be something off there (solved: this PDU)
  • iSLER: For any BLE stack we need the PDU of the received frame. This is actually wrongly logged as RSSI in the demo (iSLER fixes for #694 #798)
  • iSLER: Also RSSI we would like of course, there is BLE_ReadRssi() in the blobs (iSLER fixes for #694 #798)
  • iSLER: Frame_RX does not need a frame_info parameter (iSLER fixes for #694 #798)
  • iSLER: FRAME_BUF is TX_BUF, STATE_BUF is RX_BUF (iSLER fixes for #694 #798)
  • iSLER: TX should not memcpy the buffer (iSLER fixes for #694 #798)
  • iSLER: Frame_TX has a len parameter, but the 2nd byte in adv has to be len -2. Either also run a check on this, or abolist the len parameter (will change the API though). This came back when I noticed the iSLER demos don't have the correct lenght in the buffer, so that needs fixing too which is fixed in iSLER: fix frame length in tx buffers in the demos #809.
  • iSLER: ch585 showed there are more RF channels than the 40 BLE ones, check how many and on which chips
  • iSLER: @PinkiePie1 noticed this: CH572 can send BLE frames while in Idle mode, compared to waiting for TX to finish in while(1), the total energy consumption is about 30% less.
  • iSLER: @iracigt found out a lot about the LLE timers and their interrupts (in #isler on discord on 19 jan 26), add more LL->TMRx fields and macros where to find them in the interrupt status registers


  • Flash: a flash library that supports all chips in this series should be reversed from libISP5xx.a (CH5xx: add flash library and flashtest demo #838 )
  • Flash: @monte-monte found that there is a special sector in flash which acts a bit like an eeprom, which is not erased by normal operations and can't be read just by address, we could add an eeprom library for this.

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